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-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/mips/mips.c2
-rw-r--r--gcc/doc/md.texi2
3 files changed, 7 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8084d5c..a3e5220 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
+
+ * config/mips/mips.c (vr4130_align_insns): Fix typo.
+ * doc/md.texi (movstr): Likewise.
+
2020-01-06 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index a2ce805..c9a706e 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -18627,7 +18627,7 @@ vr4130_align_insns (void)
if (length > 0)
{
/* If the instruction is an asm statement or multi-instruction
- mips.md patern, the length is only an estimate. Insert an
+ mips.md pattern, the length is only an estimate. Insert an
8 byte alignment after it so that the following instructions
can be handled correctly. */
if (NONJUMP_INSN_P (SEQ_BEGIN (insn))
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 241c64b..6b5e06e 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -6287,7 +6287,7 @@ destination and source strings are operands 1 and 2, and both are
the expansion of this pattern should store in operand 0 the address in
which the @code{NUL} terminator was stored in the destination string.
-This patern has also several optional operands that are same as in
+This pattern has also several optional operands that are same as in
@code{setmem}.
@cindex @code{setmem@var{m}} instruction pattern