diff options
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/mips/mips.h | 4 | ||||
| -rw-r--r-- | gcc/config/mips/mips.opt | 4 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 7 |
4 files changed, 23 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4d892b5..9757be1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2013-06-04 Catherine Moore <clm@codesourcery.com> + + * config/mips/mips.opt (meva): New. + * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): + Define __mips_eva. + (ASM_SPEC): Handle -meva. + * doc/invoke.texi (meva): Document. + 2013-06-04 Alan Modra <amodra@gmail.com> * config/rs6000/rs6000.c (output_toc): Correct little-endian float diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index a8cf1db..9f983db 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -399,6 +399,9 @@ struct mips_cpu_info { if (TARGET_MCU) \ builtin_define ("__mips_mcu"); \ \ + if (TARGET_EVA) \ + builtin_define ("__mips_eva"); \ + \ if (TARGET_DSP) \ { \ builtin_define ("__mips_dsp"); \ @@ -1125,6 +1128,7 @@ struct mips_cpu_info { %{mdsp} %{mno-dsp} \ %{mdspr2} %{mno-dspr2} \ %{mmcu} %{mno-mcu} \ +%{meva} %{mno-eva} \ %{msmartmips} %{mno-smartmips} \ %{mmt} %{mno-mt} \ %{mfix-vr4120} %{mfix-vr4130} \ diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt index e11710d..08ab29b 100644 --- a/gcc/config/mips/mips.opt +++ b/gcc/config/mips/mips.opt @@ -141,6 +141,10 @@ membedded-data Target Report Var(TARGET_EMBEDDED_DATA) Use ROM instead of RAM +meva +Target Report Var(TARGET_EVA) +Use Enhanced Virtual Addressing instructions + mexplicit-relocs Target Report Mask(EXPLICIT_RELOCS) Use NewABI-style %reloc() assembly operators diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 66dcfe4..de57609 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -752,6 +752,7 @@ Objective-C and Objective-C++ Dialects}. -mno-float -msingle-float -mdouble-float @gol -mdsp -mno-dsp -mdspr2 -mno-dspr2 @gol -mmcu -mmno-mcu @gol +-meva -mno-eva @gol -mmicromips -mno-micromips @gol -mfpu=@var{fpu-type} @gol -msmartmips -mno-smartmips @gol @@ -16376,6 +16377,12 @@ Use (do not use) MT Multithreading instructions. @opindex mno-mcu Use (do not use) the MIPS MCU ASE instructions. +@item -meva +@itemx -mno-eva +@opindex meva +@opindex mno-eva +Use (do not use) the MIPS Enhanced Virtual Addressing instructions. + @item -mlong64 @opindex mlong64 Force @code{long} types to be 64 bits wide. See @option{-mlong32} for |