diff options
-rw-r--r-- | gcc/config/riscv/riscv.md | 17 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/pr106602.c | 14 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/pr95632.c | 15 |
3 files changed, 46 insertions, 0 deletions
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index a8bb331..020833b 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -1670,6 +1670,23 @@ MAX_MACHINE_MODE, &operands[3], TRUE); }) +;; Pretend to have the ability to load complex const_int in order to get +;; better code generation around them. +;; +;; But avoid constants that are special cased elsewhere. +(define_insn_and_split "*mvconst_internal" + [(set (match_operand:GPR 0 "register_operand" "=r") + (match_operand:GPR 1 "splittable_const_int_operand" "i"))] + "!(p2m1_shift_operand (operands[1]) || high_mask_shift_operand (operands[1]))" + "#" + "&& 1" + [(const_int 0)] +{ + riscv_move_integer (operands[0], operands[0], INTVAL (operands[1]), + <MODE>mode, TRUE); + DONE; +}) + ;; 64-bit integer moves (define_expand "movdi" diff --git a/gcc/testsuite/gcc.target/riscv/pr106602.c b/gcc/testsuite/gcc.target/riscv/pr106602.c new file mode 100644 index 0000000..825b1a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/pr106602.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { riscv64*-*-* } } } */ +/* { dg-options "-O2" } */ + +unsigned long +foo2 (unsigned long a) +{ + return (unsigned long)(unsigned int) a << 6; +} + +/* { dg-final { scan-assembler-times "slli\t" 1 } } */ +/* { dg-final { scan-assembler-times "srli\t" 1 } } */ +/* { dg-final { scan-assembler-not "\tli\t" } } */ +/* { dg-final { scan-assembler-not "addi\t" } } */ +/* { dg-final { scan-assembler-not "and\t" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/pr95632.c b/gcc/testsuite/gcc.target/riscv/pr95632.c new file mode 100644 index 0000000..b865c2f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/pr95632.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +unsigned short +foo (unsigned short crc) +{ + crc ^= 0x4002; + crc >>= 1; + crc |= 0x8000; + + return crc; +} + +/* { dg-final { scan-assembler-times "srli\t" 1 } } */ +/* { dg-final { scan-assembler-not "slli\t" } } */ |