diff options
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 14 | ||||
| -rw-r--r-- | libgcc/ChangeLog | 8 | ||||
| -rw-r--r-- | libgcc/config/aarch64/sfp-machine.h | 2 | ||||
| -rw-r--r-- | libgcc/config/aarch64/t-softfp | 5 |
5 files changed, 32 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f142c46..b088f7c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2016-11-24 James Greenhalgh <james.greenhalgh@arm.com> + * config/aarch64/aarch64-c.c (aarch64_scalar_mode_supported_p): New. + (TARGET_SCALAR_MODE_SUPPORTED_P): Define. + +2016-11-24 James Greenhalgh <james.greenhalgh@arm.com> + * config/aarch64/aarch64.md (<optab>sihf2): Convert to expand. (<optab>dihf2): Likewise. (aarch64_fp16_<optab><mode>hf2): New. diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 1f35220..f0e10d7 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -14265,6 +14265,17 @@ aarch64_optab_supported_p (int op, machine_mode mode1, machine_mode, } } +/* Implement TARGET_SCALAR_MODE_SUPPORTED_P - return TRUE + if MODE is HFmode, and punt to the generic implementation otherwise. */ + +static bool +aarch64_scalar_mode_supported_p (machine_mode mode) +{ + return (mode == HFmode + ? true + : default_scalar_mode_supported_p (mode)); +} + #undef TARGET_ADDRESS_COST #define TARGET_ADDRESS_COST aarch64_address_cost @@ -14475,6 +14486,9 @@ aarch64_optab_supported_p (int op, machine_mode mode1, machine_mode, #undef TARGET_RTX_COSTS #define TARGET_RTX_COSTS aarch64_rtx_costs_wrapper +#undef TARGET_SCALAR_MODE_SUPPORTED_P +#define TARGET_SCALAR_MODE_SUPPORTED_P aarch64_scalar_mode_supported_p + #undef TARGET_SCHED_ISSUE_RATE #define TARGET_SCHED_ISSUE_RATE aarch64_sched_issue_rate diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 44a7491..592fd3a 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,11 @@ +2016-11-24 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/sfp-machine.h (_FP_NANFRAC_H): Define. + (_FP_NANSIGN_H): Likewise. + * config/aarch64/t-softfp (softfp_extensions): Add hftf. + (softfp_truncations): Add tfhf. + (softfp_extras): Add required conversion functions. + 2016-11-23 James Greenhalgh <james.greenhalgh@arm.com> Matthew Wahab <matthew.wahab@arm.com> diff --git a/libgcc/config/aarch64/sfp-machine.h b/libgcc/config/aarch64/sfp-machine.h index 5efa245..da154dd 100644 --- a/libgcc/config/aarch64/sfp-machine.h +++ b/libgcc/config/aarch64/sfp-machine.h @@ -42,9 +42,11 @@ typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__))); #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y) +#define _FP_NANFRAC_H ((_FP_QNANBIT_H << 1) - 1) #define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) #define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1) #define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1 +#define _FP_NANSIGN_H 0 #define _FP_NANSIGN_S 0 #define _FP_NANSIGN_D 0 #define _FP_NANSIGN_Q 0 diff --git a/libgcc/config/aarch64/t-softfp b/libgcc/config/aarch64/t-softfp index 586dca22..c4ce0dc 100644 --- a/libgcc/config/aarch64/t-softfp +++ b/libgcc/config/aarch64/t-softfp @@ -1,8 +1,9 @@ softfp_float_modes := tf softfp_int_modes := si di ti -softfp_extensions := sftf dftf -softfp_truncations := tfsf tfdf +softfp_extensions := sftf dftf hftf +softfp_truncations := tfsf tfdf tfhf softfp_exclude_libgcc2 := n +softfp_extras := fixhfti fixunshfti floattihf floatuntihf TARGET_LIBGCC2_CFLAGS += -Wno-missing-prototypes |