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-rw-r--r--gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1a.c28
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1b.c90
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1a.c28
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1b.c89
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1a.c32
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1b.c90
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1a.c28
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1b.c90
8 files changed, 475 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1a.c
new file mode 100644
index 0000000..472454d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1a.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vfmadd231sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd231sh\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd...sh\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h a, b, c;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+ a = _mm_fmadd_sh (a, b, c);
+ a = _mm_mask_fmadd_sh (a, m, b, c);
+ c = _mm_mask3_fmadd_sh (a, b, c, m);
+ a = _mm_maskz_fmadd_sh (m, a, b, c);
+ a = _mm_fmadd_round_sh (a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+ a = _mm_mask_fmadd_round_sh (a, m, b, c, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
+ c = _mm_mask3_fmadd_round_sh (a, b, c, m, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+ a = _mm_maskz_fmadd_round_sh (m, a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1b.c
new file mode 100644
index 0000000..a0eca9c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddXXXsh-1b.c
@@ -0,0 +1,90 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_fmadd_sh(V512 * dest, V512 op1, V512 op2,
+ __mmask8 k, int zero_mask, int mask3)
+{
+ V512 v1, v2, v3, v4, v5, v6, v7, v8;
+ int i;
+
+ unpack_ph_2twops(op1, &v1, &v2);
+ unpack_ph_2twops(op2, &v3, &v4);
+ unpack_ph_2twops(*dest, &v7, &v8);
+
+ if ((k&1) || !k)
+ v5.f32[0] = v1.f32[0] * v3.f32[0] + v7.f32[0];
+ else if (zero_mask)
+ v5.f32[0] = 0;
+ else
+ v5.f32[0] = v7.f32[0];
+
+ for (i = 1; i < 8; i++){
+ if (mask3)
+ v5.f32[i] = v7.f32[i];
+ else
+ v5.f32[i] = v1.f32[i];
+ }
+ *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+
+ init_dest(&res, &exp);
+ emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_fmadd_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_fmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 1);
+ res.xmmh[0] = _mm_mask3_fmadd_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0],
+ 0x1);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask3_fmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_mask_fmadd_sh(src1.xmmh[0], 0x1, src2.xmmh[0],
+ res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask_fmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fmadd_sh(&exp, src1, src2, 0x3, 1, 0);
+ res.xmmh[0] = _mm_maskz_fmadd_sh(0x3, src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_maskz_fmadd_sh");
+
+ init_dest(&res, &exp);
+ emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_fmadd_round_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0],
+ _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_fmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 1);
+ res.xmmh[0] = _mm_mask3_fmadd_round_sh(src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0], 0x1, _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask3_fmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fmadd_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_mask_fmadd_round_sh(src1.xmmh[0], 0x1, src2.xmmh[0],
+ res.xmmh[0], _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask_fmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fmadd_sh(&exp, src1, src2, 0x3, 1, 0);
+ res.xmmh[0] = _mm_maskz_fmadd_round_sh(0x3, src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0], _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_maskz_fmadd_sh");
+
+ if (n_errs != 0) {
+ abort ();
+ }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1a.c
new file mode 100644
index 0000000..335b9e2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1a.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vfmsub231sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub231sh\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub...sh\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h a, b, c;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+ a = _mm_fmsub_sh (a, b, c);
+ a = _mm_mask_fmsub_sh (a, m, b, c);
+ c = _mm_mask3_fmsub_sh (a, b, c, m);
+ a = _mm_maskz_fmsub_sh (m, a, b, c);
+ a = _mm_fmsub_round_sh (a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+ a = _mm_mask_fmsub_round_sh (a, m, b, c, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
+ c = _mm_mask3_fmsub_round_sh (a, b, c, m, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+ a = _mm_maskz_fmsub_round_sh (m, a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1b.c
new file mode 100644
index 0000000..a2563fa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmsubXXXsh-1b.c
@@ -0,0 +1,89 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_fmsub_sh(V512 * dest, V512 op1, V512 op2,
+ __mmask8 k, int zero_mask, int mask3)
+{
+ V512 v1, v2, v3, v4, v5, v6, v7, v8;
+ int i;
+
+ unpack_ph_2twops(op1, &v1, &v2);
+ unpack_ph_2twops(op2, &v3, &v4);
+ unpack_ph_2twops(*dest, &v7, &v8);
+
+ if ((k&1) || !k)
+ v5.f32[0] = v1.f32[0] * v3.f32[0] - v7.f32[0];
+ else if (zero_mask)
+ v5.f32[0] = 0;
+ else
+ v5.f32[0] = v7.f32[0];
+ for (i = 1; i < 8; i++){
+ if (mask3)
+ v5.f32[i] = v7.f32[i];
+ else
+ v5.f32[i] = v1.f32[i];
+ }
+ *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+ init_dest(&res, &exp);
+ emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_fmsub_sh(src1.xmmh[0],
+ src2.xmmh[0], res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_fmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 1);
+ res.xmmh[0] = _mm_mask3_fmsub_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0],
+ 0x1);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask3_fmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_mask_fmsub_sh(src1.xmmh[0], 0x1, src2.xmmh[0], res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask_fmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fmsub_sh(&exp, src1, src2, 0x3, 1, 0);
+ res.xmmh[0] = _mm_maskz_fmsub_sh(0x3, src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_maskz_fmsub_sh");
+
+ init_dest(&res, &exp);
+ emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_fmsub_round_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0],
+ _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_fmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 1);
+ res.xmmh[0] = _mm_mask3_fmsub_round_sh(src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0], 0x1, _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask3_fmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fmsub_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_mask_fmsub_round_sh(src1.xmmh[0], 0x1, src2.xmmh[0],
+ res.xmmh[0], _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask_fmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fmsub_sh(&exp, src1, src2, 0x3, 1, 0);
+ res.xmmh[0] = _mm_maskz_fmsub_round_sh(0x3, src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0], _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_maskz_fmsub_sh");
+
+
+ if (n_errs != 0) {
+ abort ();
+ }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1a.c
new file mode 100644
index 0000000..77106aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1a.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vfnmadd231sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd231sh\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...sh\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h a, b, c;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+ a = _mm_fnmadd_sh (a, b, c);
+ a = _mm_mask_fnmadd_sh (a, m, b, c);
+ c = _mm_mask3_fnmadd_sh (a, b, c, m);
+ a = _mm_maskz_fnmadd_sh (m, a, b, c);
+ a = _mm_fnmadd_round_sh (a, b, c, _MM_FROUND_TO_NEAREST_INT
+ | _MM_FROUND_NO_EXC);
+ a = _mm_mask_fnmadd_round_sh (a, m, b, c, _MM_FROUND_TO_NEG_INF
+ | _MM_FROUND_NO_EXC);
+ c = _mm_mask3_fnmadd_round_sh (a, b, c, m, _MM_FROUND_TO_POS_INF
+ | _MM_FROUND_NO_EXC);
+ a = _mm_maskz_fnmadd_round_sh (m, a, b, c, _MM_FROUND_TO_ZERO
+ | _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1b.c
new file mode 100644
index 0000000..9200150
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmaddXXXsh-1b.c
@@ -0,0 +1,90 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_fnmadd_sh(V512 * dest, V512 op1, V512 op2,
+ __mmask8 k, int zero_mask, int mask3)
+{
+ V512 v1, v2, v3, v4, v5, v6, v7, v8;
+ int i;
+
+ unpack_ph_2twops(op1, &v1, &v2);
+ unpack_ph_2twops(op2, &v3, &v4);
+ unpack_ph_2twops(*dest, &v7, &v8);
+
+ if ((k&1) || !k)
+ v5.f32[0] = -(v1.f32[0] * v3.f32[0]) + v7.f32[0];
+ else if (zero_mask)
+ v5.f32[0] = 0;
+ else
+ v5.f32[0] = v7.f32[0];
+
+ for (i = 1; i < 8; i++){
+ if (mask3)
+ v5.f32[i] = v7.f32[i];
+ else
+ v5.f32[i] = v1.f32[i];
+ }
+ *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+
+ init_dest(&res, &exp);
+ emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_fnmadd_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_fnmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 1);
+ res.xmmh[0] = _mm_mask3_fnmadd_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0],
+ 0x1);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask3_fnmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_mask_fnmadd_sh(src1.xmmh[0], 0x1, src2.xmmh[0],
+ res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask_fnmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fnmadd_sh(&exp, src1, src2, 0x3, 1, 0);
+ res.xmmh[0] = _mm_maskz_fnmadd_sh(0x3, src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_maskz_fnmadd_sh");
+
+ init_dest(&res, &exp);
+ emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_fnmadd_round_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0],
+ _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_fnmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 1);
+ res.xmmh[0] = _mm_mask3_fnmadd_round_sh(src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0], 0x1, _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask3_fnmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fnmadd_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_mask_fnmadd_round_sh(src1.xmmh[0], 0x1, src2.xmmh[0],
+ res.xmmh[0], _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask_fnmadd_sh");
+ init_dest(&res, &exp);
+ emulate_fnmadd_sh(&exp, src1, src2, 0x3, 1, 0);
+ res.xmmh[0] = _mm_maskz_fnmadd_round_sh(0x3, src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0], _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_maskz_fnmadd_sh");
+
+ if (n_errs != 0) {
+ abort ();
+ }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1a.c
new file mode 100644
index 0000000..5d14608
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1a.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vfnmsub231sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub231sh\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...sh\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h a, b, c;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+ a = _mm_fnmsub_sh (a, b, c);
+ a = _mm_mask_fnmsub_sh (a, m, b, c);
+ c = _mm_mask3_fnmsub_sh (a, b, c, m);
+ a = _mm_maskz_fnmsub_sh (m, a, b, c);
+ a = _mm_fnmsub_round_sh (a, b, c, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+ a = _mm_mask_fnmsub_round_sh (a, m, b, c, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
+ c = _mm_mask3_fnmsub_round_sh (a, b, c, m, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+ a = _mm_maskz_fnmsub_round_sh (m, a, b, c, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1b.c
new file mode 100644
index 0000000..7bdb861
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfnmsubXXXsh-1b.c
@@ -0,0 +1,90 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_fnmsub_sh(V512 * dest, V512 op1, V512 op2,
+ __mmask8 k, int zero_mask, int mask3)
+{
+ V512 v1, v2, v3, v4, v5, v6, v7, v8;
+ int i;
+
+ unpack_ph_2twops(op1, &v1, &v2);
+ unpack_ph_2twops(op2, &v3, &v4);
+ unpack_ph_2twops(*dest, &v7, &v8);
+
+ if ((k&1) || !k)
+ v5.f32[0] = -(v1.f32[0] * v3.f32[0]) - v7.f32[0];
+ else if (zero_mask)
+ v5.f32[0] = 0;
+ else
+ v5.f32[0] = v7.f32[0];
+
+ for (i = 1; i < 8; i++){
+ if (mask3)
+ v5.f32[i] = v7.f32[i];
+ else
+ v5.f32[i] = v1.f32[i];
+ }
+ *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+
+ init_dest(&res, &exp);
+ emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_fnmsub_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_fnmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 1);
+ res.xmmh[0] = _mm_mask3_fnmsub_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0],
+ 0x1);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask3_fnmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_mask_fnmsub_sh(src1.xmmh[0], 0x1, src2.xmmh[0],
+ res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask_fnmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fnmsub_sh(&exp, src1, src2, 0x3, 1, 0);
+ res.xmmh[0] = _mm_maskz_fnmsub_sh(0x3, src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0]);
+ check_results(&res, &exp, N_ELEMS, "_mm_maskz_fnmsub_sh");
+
+ init_dest(&res, &exp);
+ emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_fnmsub_round_sh(src1.xmmh[0], src2.xmmh[0], res.xmmh[0],
+ _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_fnmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 1);
+ res.xmmh[0] = _mm_mask3_fnmsub_round_sh(src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0], 0x1, _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask3_fnmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fnmsub_sh(&exp, src1, src2, 0x1, 0, 0);
+ res.xmmh[0] = _mm_mask_fnmsub_round_sh(src1.xmmh[0], 0x1, src2.xmmh[0],
+ res.xmmh[0], _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask_fnmsub_sh");
+ init_dest(&res, &exp);
+ emulate_fnmsub_sh(&exp, src1, src2, 0x3, 1, 0);
+ res.xmmh[0] = _mm_maskz_fnmsub_round_sh(0x3, src1.xmmh[0], src2.xmmh[0],
+ res.xmmh[0], _ROUND_NINT);
+ check_results(&res, &exp, N_ELEMS, "_mm_maskz_fnmsub_sh");
+
+ if (n_errs != 0) {
+ abort ();
+ }
+}
+