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-rw-r--r--gcc/basic-block.h68
-rw-r--r--gcc/caller-save.c10
-rw-r--r--gcc/expr.h7
-rw-r--r--gcc/hard-reg-set.h267
-rw-r--r--gcc/loop.h6
-rw-r--r--gcc/real.h8
6 files changed, 349 insertions, 17 deletions
diff --git a/gcc/basic-block.h b/gcc/basic-block.h
new file mode 100644
index 0000000..bd9fdf3
--- /dev/null
+++ b/gcc/basic-block.h
@@ -0,0 +1,68 @@
+/* Define control and data flow tables, and regsets.
+ Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+
+/* Number of bits in each actual element of a regset. */
+
+#define REGSET_ELT_BITS HOST_BITS_PER_WIDE_INT
+
+/* Type to use for a regset element. Note that lots of code assumes
+ that the initial part of a regset that contains information on the
+ hard registers is the same format as a HARD_REG_SET. */
+
+#define REGSET_ELT_TYPE HOST_WIDE_INT
+
+/* Define the type for a pointer to a set with a bit for each
+ (hard or pseudo) register. */
+
+typedef REGSET_ELT_TYPE *regset;
+
+/* Size of a regset for the current function,
+ in (1) bytes and (2) elements. */
+
+extern int regset_bytes;
+extern int regset_size;
+
+/* Number of basic blocks in the current function. */
+
+extern int n_basic_blocks;
+
+/* Index by basic block number, get first insn in the block. */
+
+extern rtx *basic_block_head;
+
+/* Index by basic block number, get last insn in the block. */
+
+extern rtx *basic_block_end;
+
+/* Index by basic block number, get address of regset
+ describing the registers live at the start of that block. */
+
+extern regset *basic_block_live_at_start;
+
+/* Indexed by n, gives number of basic block that (REG n) is used in.
+ If the value is REG_BLOCK_GLOBAL (-2),
+ it means (REG n) is used in more than one basic block.
+ REG_BLOCK_UNKNOWN (-1) means it hasn't been seen yet so we don't know.
+ This information remains valid for the rest of the compilation
+ of the current function; it is used to control register allocation. */
+
+#define REG_BLOCK_UNKNOWN -1
+#define REG_BLOCK_GLOBAL -2
+extern short *reg_basic_block;
diff --git a/gcc/caller-save.c b/gcc/caller-save.c
index dfca1e7..025543a 100644
--- a/gcc/caller-save.c
+++ b/gcc/caller-save.c
@@ -165,8 +165,7 @@ init_caller_save ()
for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
{
- address = gen_rtx (PLUS, Pmode, addr_reg,
- gen_rtx (CONST_INT, VOIDmode, offset));
+ address = gen_rtx (PLUS, Pmode, addr_reg, GEN_INT (offset));
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (regno_save_mode[i] != VOIDmode
@@ -275,7 +274,7 @@ setup_save_areas (pchanged)
if (regno_save_mem[i] != 0)
ok &= strict_memory_address_p (regno_save_mode[i],
XEXP (eliminate_regs (regno_save_mem[i],
- 0, 0),
+ 0, NULL_RTX),
0));
return ok;
@@ -297,7 +296,8 @@ save_call_clobbered_regs (insn_mode)
for (b = 0; b < n_basic_blocks; b++)
{
regset regs_live = basic_block_live_at_start[b];
- int offset, bit, i, j;
+ REGSET_ELT_TYPE bit;
+ int offset, i, j;
int regno;
/* Compute hard regs live at start of block -- this is the
@@ -318,7 +318,7 @@ save_call_clobbered_regs (insn_mode)
for (offset = 0, i = 0; offset < regset_size; offset++)
{
if (regs_live[offset] == 0)
- i += HOST_BITS_PER_INT;
+ i += REGSET_ELT_BITS;
else
for (bit = 1; bit && i < max_regno; bit <<= 1, i++)
if ((regs_live[offset] & bit)
diff --git a/gcc/expr.h b/gcc/expr.h
index 2e5ae99..6b6d9bf 100644
--- a/gcc/expr.h
+++ b/gcc/expr.h
@@ -153,10 +153,10 @@ struct args_size
/* Convert the implicit sum in a `struct args_size' into an rtx. */
#define ARGS_SIZE_RTX(SIZE) \
-((SIZE).var == 0 ? gen_rtx (CONST_INT, VOIDmode, (SIZE).constant) \
+((SIZE).var == 0 ? GEN_INT ((SIZE).constant) \
: expand_expr (size_binop (PLUS_EXPR, (SIZE).var, \
size_int ((SIZE).constant)), \
- 0, VOIDmode, 0))
+ NULL_RTX, VOIDmode, 0))
/* Convert the implicit sum in a `struct args_size' into a tree. */
#define ARGS_SIZE_TREE(SIZE) \
@@ -527,9 +527,6 @@ extern rtx force_operand ();
/* Return an rtx for the size in bytes of the value of an expr. */
extern rtx expr_size ();
-/* Return an rtx for the sum of an rtx and an integer. */
-extern rtx plus_constant ();
-
extern rtx lookup_static_chain ();
/* Return an rtx like arg but sans any constant terms.
diff --git a/gcc/hard-reg-set.h b/gcc/hard-reg-set.h
new file mode 100644
index 0000000..1c3342a
--- /dev/null
+++ b/gcc/hard-reg-set.h
@@ -0,0 +1,267 @@
+/* Sets (bit vectors) of hard registers, and operations on them.
+ Copyright (C) 1987, 1992 Free Software Foundation, Inc.
+
+This file is part of GNU CC
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+
+/* Define the type of a set of hard registers. */
+
+/* If HARD_REG_SET is a macro, its definition is a scalar type
+ that has enough bits for all the target machine's hard registers.
+ Otherwise, it is a typedef for a suitable array of HOST_WIDE_INTs,
+ and HARD_REG_SET_LONGS is how many.
+
+ Note that lots of code assumes that the first part of a regset is
+ the same format as a HARD_REG_SET. To help make sure this is true,
+ we only try the widest integer mode (HOST_WIDE_INT) instead of all the
+ smaller types. This only loses if there are a very few registers and
+ then only in the few cases where we have an array of HARD_REG_SETs,
+ so it isn't worth making this as complex as it used to be. */
+
+#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDE_INT
+#define HARD_REG_SET HOST_WIDE_INT
+
+#else
+
+#define HARD_REG_SET_LONGS \
+ ((FIRST_PSEUDO_REGISTER + HOST_BITS_PER_WIDE_INT - 1) \
+ / HOST_BITS_PER_WIDE_INT)
+typedef HOST_WIDE_INT HARD_REG_SET[HARD_REG_SET_LONGS];
+
+#endif
+
+/* HARD_CONST is used to cast a constant to a HARD_REG_SET
+ if that is a scalar wider than an integer. */
+
+#ifdef HARD_REG_SET
+#define HARD_CONST(X) ((HARD_REG_SET) (X))
+#else
+#define HARD_CONST(X) (X)
+#endif
+
+/* Define macros SET_HARD_REG_BIT, CLEAR_HARD_REG_BIT and TEST_HARD_REG_BIT
+ to set, clear or test one bit in a hard reg set of type HARD_REG_SET.
+ All three take two arguments: the set and the register number.
+
+ In the case where sets are arrays of longs, the first argument
+ is actually a pointer to a long.
+
+ Define two macros for initializing a set:
+ CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
+ These take just one argument.
+
+ Also define macros for copying hard reg sets:
+ COPY_HARD_REG_SET and COMPL_HARD_REG_SET.
+ These take two arguments TO and FROM; they read from FROM
+ and store into TO. COMPL_HARD_REG_SET complements each bit.
+
+ Also define macros for combining hard reg sets:
+ IOR_HARD_REG_SET and AND_HARD_REG_SET.
+ These take two arguments TO and FROM; they read from FROM
+ and combine bitwise into TO. Define also two variants
+ IOR_COMPL_HARD_REG_SET and AND_COMPL_HARD_REG_SET
+ which use the complement of the set FROM.
+
+ Also define GO_IF_HARD_REG_SUBSET (X, Y, TO):
+ if X is a subset of Y, go to TO.
+*/
+
+#ifdef HARD_REG_SET
+
+#define SET_HARD_REG_BIT(SET, BIT) \
+ ((SET) |= HARD_CONST (1) << (BIT))
+#define CLEAR_HARD_REG_BIT(SET, BIT) \
+ ((SET) &= ~(HARD_CONST (1) << (BIT)))
+#define TEST_HARD_REG_BIT(SET, BIT) \
+ ((SET) & (HARD_CONST (1) << (BIT)))
+
+#define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0))
+#define SET_HARD_REG_SET(TO) ((TO) = HARD_CONST (-1))
+
+#define COPY_HARD_REG_SET(TO, FROM) ((TO) = (FROM))
+#define COMPL_HARD_REG_SET(TO, FROM) ((TO) = ~(FROM))
+
+#define IOR_HARD_REG_SET(TO, FROM) ((TO) |= (FROM))
+#define IOR_COMPL_HARD_REG_SET(TO, FROM) ((TO) |= ~ (FROM))
+#define AND_HARD_REG_SET(TO, FROM) ((TO) &= (FROM))
+#define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
+
+#define GO_IF_HARD_REG_SUBSET(X,Y,TO) if (HARD_CONST (0) == ((X) & ~(Y))) goto TO
+
+#define GO_IF_HARD_REG_EQUAL(X,Y,TO) if ((X) == (Y)) goto TO
+#else
+
+#define UHOST_BITS_PER_WIDE_INT ((unsigned) HOST_BITS_PER_WIDE_INT)
+
+#define SET_HARD_REG_BIT(SET, BIT) \
+ ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
+ |= (HOST_WIDE_INT) 1 << ((BIT) % UHOST_BITS_PER_WIDE_INT))
+
+#define CLEAR_HARD_REG_BIT(SET, BIT) \
+ ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
+ &= ~((HOST_WIDE_INT) 1 << ((BIT) % UHOST_BITS_PER_WIDE_INT)))
+
+#define TEST_HARD_REG_BIT(SET, BIT) \
+ ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
+ & ((HOST_WIDE_INT) 1 << ((BIT) % UHOST_BITS_PER_WIDE_INT)))
+
+#define CLEAR_HARD_REG_SET(TO) \
+do { register HOST_WIDE_INT *scan_tp_ = (TO); \
+ register int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ = 0; } while (0)
+
+#define SET_HARD_REG_SET(TO) \
+do { register HOST_WIDE_INT *scan_tp_ = (TO); \
+ register int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ = -1; } while (0)
+
+#define COPY_HARD_REG_SET(TO, FROM) \
+do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ register int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ = *scan_fp_++; } while (0)
+
+#define COMPL_HARD_REG_SET(TO, FROM) \
+do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ register int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ = ~ *scan_fp_++; } while (0)
+
+#define AND_HARD_REG_SET(TO, FROM) \
+do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ register int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ &= *scan_fp_++; } while (0)
+
+#define AND_COMPL_HARD_REG_SET(TO, FROM) \
+do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ register int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ &= ~ *scan_fp_++; } while (0)
+
+#define IOR_HARD_REG_SET(TO, FROM) \
+do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ register int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ |= *scan_fp_++; } while (0)
+
+#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
+do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
+ register int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ *scan_tp_++ |= ~ *scan_fp_++; } while (0)
+
+#define GO_IF_HARD_REG_SUBSET(X,Y,TO) \
+do { register HOST_WIDE_INT *scan_xp_ = (X), *scan_yp_ = (Y); \
+ register int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ if (0 != (*scan_xp_++ & ~*scan_yp_++)) break; \
+ if (i == HARD_REG_SET_LONGS) goto TO; } while (0)
+
+#define GO_IF_HARD_REG_EQUAL(X,Y,TO) \
+do { register HOST_WIDE_INT *scan_xp_ = (X), *scan_yp_ = (Y); \
+ register int i; \
+ for (i = 0; i < HARD_REG_SET_LONGS; i++) \
+ if (*scan_xp_++ != ~*scan_yp_++)) break; \
+ if (i == HARD_REG_SET_LONGS) goto TO; } while (0)
+
+#endif
+
+/* Define some standard sets of registers. */
+
+/* Indexed by hard register number, contains 1 for registers
+ that are fixed use (stack pointer, pc, frame pointer, etc.).
+ These are the registers that cannot be used to allocate
+ a pseudo reg whose life does not cross calls. */
+
+extern char fixed_regs[FIRST_PSEUDO_REGISTER];
+
+/* The same info as a HARD_REG_SET. */
+
+extern HARD_REG_SET fixed_reg_set;
+
+/* Indexed by hard register number, contains 1 for registers
+ that are fixed use or are clobbered by function calls.
+ These are the registers that cannot be used to allocate
+ a pseudo reg whose life crosses calls. */
+
+extern char call_used_regs[FIRST_PSEUDO_REGISTER];
+
+/* The same info as a HARD_REG_SET. */
+
+extern HARD_REG_SET call_used_reg_set;
+
+/* Indexed by hard register number, contains 1 for registers that are
+ fixed use -- i.e. in fixed_regs -- or a function value return register
+ or STRUCT_VALUE_REGNUM or STATIC_CHAIN_REGNUM. These are the
+ registers that cannot hold quantities across calls even if we are
+ willing to save and restore them. */
+
+extern char call_fixed_regs[FIRST_PSEUDO_REGISTER];
+
+/* The same info as a HARD_REG_SET. */
+
+extern HARD_REG_SET call_fixed_reg_set;
+
+/* Indexed by hard register number, contains 1 for registers
+ that are being used for global register decls.
+ These must be exempt from ordinary flow analysis
+ and are also considered fixed. */
+
+extern char global_regs[FIRST_PSEUDO_REGISTER];
+
+/* Table of register numbers in the order in which to try to use them. */
+
+#ifdef REG_ALLOC_ORDER /* Avoid undef symbol in certain broken linkers. */
+extern int reg_alloc_order[FIRST_PSEUDO_REGISTER];
+#endif
+
+/* For each reg class, a HARD_REG_SET saying which registers are in it. */
+
+extern HARD_REG_SET reg_class_contents[];
+
+/* For each reg class, number of regs it contains. */
+
+extern int reg_class_size[N_REG_CLASSES];
+
+/* For each reg class, table listing all the containing classes. */
+
+extern enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES];
+
+/* For each reg class, table listing all the classes contained in it. */
+
+extern enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
+
+/* For each pair of reg classes,
+ a largest reg class contained in their union. */
+
+extern enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
+
+/* For each pair of reg classes,
+ the smallest reg class that contains their union. */
+
+extern enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
+
+/* Number of non-fixed registers. */
+
+extern int n_non_fixed_regs;
+
+/* Vector indexed by hardware reg giving its name. */
+
+extern char *reg_names[FIRST_PSEUDO_REGISTER];
diff --git a/gcc/loop.h b/gcc/loop.h
index f57b4c9..7def978 100644
--- a/gcc/loop.h
+++ b/gcc/loop.h
@@ -100,7 +100,7 @@ struct induction
struct induction *same; /* If this giv has been combined with another
giv, this points to the base giv. The base
giv will have COMBINED_WITH non-zero. */
- int const_adjust; /* Used by loop unrolling, when an address giv
+ HOST_WIDE_INT const_adjust; /* Used by loop unrolling, when an address giv
is split, and a constant is eliminated from
the address, the -constant is stored here
for later use. */
@@ -141,7 +141,7 @@ extern int max_uid_for_loop;
extern int *uid_loop_num;
extern int *loop_outer_loop;
extern rtx *loop_number_exit_labels;
-extern unsigned long loop_n_iterations;
+extern unsigned HOST_WIDE_INT loop_n_iterations;
extern int max_reg_before_loop;
extern FILE *loop_dump_stream;
@@ -169,7 +169,7 @@ void unroll_block_trees ();
void unroll_loop ();
rtx biv_total_increment ();
-unsigned long loop_iterations ();
+unsigned HOST_WIDE_INT loop_iterations ();
rtx final_biv_value ();
rtx final_giv_value ();
void emit_unrolled_add ();
diff --git a/gcc/real.h b/gcc/real.h
index e191944..7e6579f 100644
--- a/gcc/real.h
+++ b/gcc/real.h
@@ -53,7 +53,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
#define REAL_IS_NOT_DOUBLE
#ifndef REAL_VALUE_TYPE
#define REAL_VALUE_TYPE \
- struct real_value { long i[sizeof (double) / sizeof (long)]; }
+ struct real_value{ HOST_WIDE_INT i[sizeof (double)/sizeof (HOST_WIDE_INT)]; }
#endif /* no REAL_VALUE_TYPE */
#endif /* formats differ */
#endif /* 0 */
@@ -196,7 +196,7 @@ extern REAL_VALUE_TYPE dconstm1;
union real_extract
{
REAL_VALUE_TYPE d;
- int i[sizeof (REAL_VALUE_TYPE) / sizeof (int)];
+ HOST_WIDE_INT i[sizeof (REAL_VALUE_TYPE) / sizeof (HOST_WIDE_INT)];
};
/* For a CONST_DOUBLE:
@@ -206,8 +206,8 @@ union real_extract
For a float, the number of ints varies,
and CONST_DOUBLE_LOW is the one that should come first *in memory*.
So use &CONST_DOUBLE_LOW(r) as the address of an array of ints. */
-#define CONST_DOUBLE_LOW(r) XINT (r, 2)
-#define CONST_DOUBLE_HIGH(r) XINT (r, 3)
+#define CONST_DOUBLE_LOW(r) XWINT (r, 2)
+#define CONST_DOUBLE_HIGH(r) XWINT (r, 3)
/* Link for chain of all CONST_DOUBLEs in use in current function. */
#define CONST_DOUBLE_CHAIN(r) XEXP (r, 1)