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-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/testsuite/ChangeLog7
-rw-r--r--gcc/testsuite/gcc.dg/vect/vect-simd-11.c186
-rw-r--r--gcc/testsuite/gcc.target/i386/avx2-vect-simd-11.c16
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512bw-vect-simd-11.c16
-rw-r--r--gcc/testsuite/gcc.target/i386/sse2-vect-simd-11.c16
-rw-r--r--gcc/tree-vect-data-refs.c9
7 files changed, 252 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1724c49..b585b32 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-06-21 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-vect-data-refs.c (vect_find_stmt_data_reference): Handle
+ "omp simd array" arrays with one byte elements.
+
2019-06-20 Uroš Bizjak <ubizjak@gmail.com>
* config/alpha/alpha.md (@unaligned_store<mode>):
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5697e18..221fb69 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2019-06-21 Jakub Jelinek <jakub@redhat.com>
+
+ * gcc.dg/vect/vect-simd-11.c: New test.
+ * gcc.target/i386/sse2-vect-simd-11.c: New test.
+ * gcc.target/i386/avx2-vect-simd-11.c: New test.
+ * gcc.target/i386/avx512bw-vect-simd-11.c: New test.
+
2019-06-20 Marek Polacek <polacek@redhat.com>
PR c++/79781
diff --git a/gcc/testsuite/gcc.dg/vect/vect-simd-11.c b/gcc/testsuite/gcc.dg/vect/vect-simd-11.c
new file mode 100644
index 0000000..e7d8aa0
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/vect-simd-11.c
@@ -0,0 +1,186 @@
+/* { dg-require-effective-target size32plus } */
+/* { dg-additional-options "-fopenmp-simd" } */
+/* { dg-additional-options "-mavx" { target avx_runtime } } */
+/* { dg-final { scan-tree-dump-times "vectorized \[1-3] loops" 2 "vect" { target i?86-*-* x86_64-*-* } } } */
+
+#ifndef main
+#include "tree-vect.h"
+#endif
+
+int r, a[1024], b[1024];
+unsigned short r2, b2[1024];
+unsigned char r3, b3[1024];
+
+__attribute__((noipa)) void
+foo (int *a, int *b, unsigned short *b2, unsigned char *b3)
+{
+ #pragma omp simd reduction (inscan, +:r, r2, r3)
+ for (int i = 0; i < 1024; i++)
+ {
+ { r += a[i]; r2 += a[i]; r3 += a[i]; }
+ #pragma omp scan inclusive(r, r2, r3)
+ {
+ b[i] = r;
+ b2[i] = r2;
+ b3[i] = r3;
+ }
+ }
+}
+
+__attribute__((noipa)) int
+bar (unsigned short *s2p, unsigned char *s3p)
+{
+ int s = 0;
+ unsigned short s2 = 0;
+ unsigned char s3 = 0;
+ #pragma omp simd reduction (inscan, +:s, s2, s3)
+ for (int i = 0; i < 1024; i++)
+ {
+ {
+ s += 2 * a[i];
+ s2 += 2 * a[i];
+ s3 += 2 * a[i];
+ }
+ #pragma omp scan inclusive(s, s2, s3)
+ { b[i] = s; b2[i] = s2; b3[i] = s3; }
+ }
+ *s2p = s2;
+ *s3p = s3;
+ return s;
+}
+
+__attribute__((noipa)) void
+baz (int *a, int *b, unsigned short *b2, unsigned char *b3)
+{
+ #pragma omp simd reduction (inscan, +:r, r2, r3) if (simd: 0)
+ for (int i = 0; i < 1024; i++)
+ {
+ {
+ r += a[i];
+ r2 += a[i];
+ r3 += a[i];
+ }
+ #pragma omp scan inclusive(r, r2, r3)
+ {
+ b[i] = r;
+ b2[i] = r2;
+ b3[i] = r3;
+ }
+ }
+}
+
+__attribute__((noipa)) int
+qux (unsigned short *s2p, unsigned char *s3p)
+{
+ int s = 0;
+ unsigned short s2 = 0;
+ unsigned char s3 = 0;
+ #pragma omp simd reduction (inscan, +:s, s2, s3) simdlen (1)
+ for (int i = 0; i < 1024; i++)
+ {
+ { s += 2 * a[i]; s2 += 2 * a[i]; s3 += 2 * a[i]; }
+ #pragma omp scan inclusive(s, s2, s3)
+ { b[i] = s; b2[i] = s2; b3[i] = s3; }
+ }
+ *s2p = s2;
+ *s3p = s3;
+ return s;
+}
+
+int
+main ()
+{
+ int s = 0;
+ unsigned short s2;
+ unsigned char s3;
+#ifndef main
+ check_vect ();
+#endif
+ for (int i = 0; i < 1024; ++i)
+ {
+ a[i] = i;
+ b[i] = -1;
+ b2[i] = -1;
+ b3[i] = -1;
+ asm ("" : "+g" (i));
+ }
+ foo (a, b, b2, b3);
+ if (r != 1024 * 1023 / 2
+ || r2 != (unsigned short) r
+ || r3 != (unsigned char) r)
+ abort ();
+ for (int i = 0; i < 1024; ++i)
+ {
+ s += i;
+ if (b[i] != s
+ || b2[i] != (unsigned short) s
+ || b3[i] != (unsigned char) s)
+ abort ();
+ else
+ {
+ b[i] = 25;
+ b2[i] = 24;
+ b3[i] = 26;
+ }
+ }
+ if (bar (&s2, &s3) != 1024 * 1023)
+ abort ();
+ if (s2 != (unsigned short) (1024 * 1023)
+ || s3 != (unsigned char) (1024 * 1023))
+ abort ();
+ s = 0;
+ for (int i = 0; i < 1024; ++i)
+ {
+ s += 2 * i;
+ if (b[i] != s
+ || b2[i] != (unsigned short) s
+ || b3[i] != (unsigned char) s)
+ abort ();
+ else
+ {
+ b[i] = -1;
+ b2[i] = -1;
+ b3[i] = -1;
+ }
+ }
+ r = 0;
+ r2 = 0;
+ r3 = 0;
+ baz (a, b, b2, b3);
+ if (r != 1024 * 1023 / 2
+ || r2 != (unsigned short) r
+ || r3 != (unsigned char) r)
+ abort ();
+ s = 0;
+ for (int i = 0; i < 1024; ++i)
+ {
+ s += i;
+ if (b[i] != s
+ || b2[i] != (unsigned short) s
+ || b3[i] != (unsigned char) s)
+ abort ();
+ else
+ {
+ b[i] = 25;
+ b2[i] = 24;
+ b3[i] = 26;
+ }
+ }
+ s2 = 0;
+ s3 = 0;
+ if (qux (&s2, &s3) != 1024 * 1023)
+ abort ();
+ if (s2 != (unsigned short) (1024 * 1023)
+ || s3 != (unsigned char) (1024 * 1023))
+ abort ();
+ s = 0;
+ for (int i = 0; i < 1024; ++i)
+ {
+ s += 2 * i;
+ if (b[i] != s
+ || b2[i] != (unsigned short) s
+ || b3[i] != (unsigned char) s)
+ abort ();
+ }
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx2-vect-simd-11.c b/gcc/testsuite/gcc.target/i386/avx2-vect-simd-11.c
new file mode 100644
index 0000000..722217a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx2-vect-simd-11.c
@@ -0,0 +1,16 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -fopenmp-simd -mavx2 -fdump-tree-vect-details" } */
+/* { dg-require-effective-target avx2 } */
+/* { dg-final { scan-tree-dump-times "vectorized \[1-3] loops" 2 "vect" } } */
+
+#include "avx2-check.h"
+
+#define main() do_main ()
+
+#include "../../gcc.dg/vect/vect-simd-11.c"
+
+static void
+avx2_test (void)
+{
+ do_main ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vect-simd-11.c b/gcc/testsuite/gcc.target/i386/avx512bw-vect-simd-11.c
new file mode 100644
index 0000000..92f8613
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vect-simd-11.c
@@ -0,0 +1,16 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -fopenmp-simd -mavx512bw -mprefer-vector-width=512 -fdump-tree-vect-details" } */
+/* { dg-require-effective-target avx512bw } */
+/* { dg-final { scan-tree-dump-times "vectorized \[1-3] loops" 2 "vect" } } */
+
+#include "avx512bw-check.h"
+
+#define main() do_main ()
+
+#include "../../gcc.dg/vect/vect-simd-11.c"
+
+static void
+avx512bw_test (void)
+{
+ do_main ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse2-vect-simd-11.c b/gcc/testsuite/gcc.target/i386/sse2-vect-simd-11.c
new file mode 100644
index 0000000..aed43d5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse2-vect-simd-11.c
@@ -0,0 +1,16 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -fopenmp-simd -msse2 -mno-sse3 -fdump-tree-vect-details" } */
+/* { dg-require-effective-target sse2 } */
+/* { dg-final { scan-tree-dump-times "vectorized \[1-3] loops" 2 "vect" } } */
+
+#include "sse2-check.h"
+
+#define main() do_main ()
+
+#include "../../gcc.dg/vect/vect-simd-11.c"
+
+static void
+sse2_test (void)
+{
+ do_main ();
+}
diff --git a/gcc/tree-vect-data-refs.c b/gcc/tree-vect-data-refs.c
index f2f0d23..35a48d1 100644
--- a/gcc/tree-vect-data-refs.c
+++ b/gcc/tree-vect-data-refs.c
@@ -4075,14 +4075,17 @@ vect_find_stmt_data_reference (loop_p loop, gimple *stmt,
&& integer_zerop (DR_STEP (newdr)))
{
tree off = DR_OFFSET (newdr);
+ tree step = ssize_int (1);
STRIP_NOPS (off);
- if (TREE_CODE (DR_INIT (newdr)) == INTEGER_CST
- && TREE_CODE (off) == MULT_EXPR
+ if (TREE_CODE (off) == MULT_EXPR
&& tree_fits_uhwi_p (TREE_OPERAND (off, 1)))
{
- tree step = TREE_OPERAND (off, 1);
+ step = TREE_OPERAND (off, 1);
off = TREE_OPERAND (off, 0);
STRIP_NOPS (off);
+ }
+ if (TREE_CODE (DR_INIT (newdr)) == INTEGER_CST)
+ {
if (CONVERT_EXPR_P (off)
&& (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (off, 0)))
< TYPE_PRECISION (TREE_TYPE (off))))