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-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/i386/i386.c4
-rw-r--r--gcc/doc/extend.texi2
-rw-r--r--gcc/testsuite/ChangeLog4
-rw-r--r--gcc/testsuite/gcc.target/i386/builtin_target.c2
-rw-r--r--libgcc/ChangeLog6
-rw-r--r--libgcc/config/i386/i386-cpuinfo.c21
7 files changed, 39 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 22011ca..ef6fc51 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-04-25 Sriraman Tallam <tmsriram@google.com>
+
+ * doc/extend.texi: Document avx2 support.
+ * config/i386/i386.c (fold_builtin_cpu): Add avx2.
+
2012-04-26 Hans-Peter Nilsson <hp@axis.com>
PR target/53120
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 13cb4bd..a34c68c 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -27763,6 +27763,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
F_SSE4_1,
F_SSE4_2,
F_AVX,
+ F_AVX2,
F_MAX
};
@@ -27830,7 +27831,8 @@ fold_builtin_cpu (tree fndecl, tree *args)
{"ssse3", F_SSSE3},
{"sse4.1", F_SSE4_1},
{"sse4.2", F_SSE4_2},
- {"avx", F_AVX}
+ {"avx", F_AVX},
+ {"avx2", F_AVX2}
};
static tree __processor_model_type = NULL_TREE;
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 7c0d2f2..473339e 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -9541,6 +9541,8 @@ SSE4.1 instructions.
SSE4.2 instructions.
@item avx
AVX instructions.
+@item avx2
+AVX2 instructions.
@end table
Here is an example:
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 92c1160..a566f6a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2012-04-25 Sriraman Tallam <tmsriram@google.com>
+
+ * testsuite/gcc.target/i386/builtin_target.c: Check avx2.
+
2012-04-26 Alan Modra <amodra@gmail.com>
* gcc.target/powerpc/savres.c: New test.
diff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c b/gcc/testsuite/gcc.target/i386/builtin_target.c
index 0258cd2..7705315 100644
--- a/gcc/testsuite/gcc.target/i386/builtin_target.c
+++ b/gcc/testsuite/gcc.target/i386/builtin_target.c
@@ -29,6 +29,8 @@ fn1 ()
assert (__builtin_cpu_supports ("avx") >= 0);
+ assert (__builtin_cpu_supports ("avx2") >= 0);
+
/* Check CPU type. */
assert (__builtin_cpu_is ("amd") >= 0);
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 831fa12..16fb553 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,9 @@
+2012-04-25 Sriraman Tallam <tmsriram@google.com>
+
+ * config/i386/i386-cpuinfo.c (FEATURE_AVX2): New enum value.
+ (get_available_features): New argument. Check for AVX2.
+ (__cpu_indicator_init): Modify call to get_available_features.
+
2012-04-25 Alan Modra <amodra@gmail.com>
* config/rs6000/crtsavevr.S: New file.
diff --git a/libgcc/config/i386/i386-cpuinfo.c b/libgcc/config/i386/i386-cpuinfo.c
index dccf1d5..6934778 100644
--- a/libgcc/config/i386/i386-cpuinfo.c
+++ b/libgcc/config/i386/i386-cpuinfo.c
@@ -75,7 +75,8 @@ enum processor_features
FEATURE_SSSE3,
FEATURE_SSE4_1,
FEATURE_SSE4_2,
- FEATURE_AVX
+ FEATURE_AVX,
+ FEATURE_AVX2
};
struct __processor_model
@@ -191,8 +192,11 @@ get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
}
}
+/* ECX and EDX are output of CPUID at level one. MAX_CPUID_LEVEL is
+ the max possible level of CPUID insn. */
static void
-get_available_features (unsigned int ecx, unsigned int edx)
+get_available_features (unsigned int ecx, unsigned int edx,
+ int max_cpuid_level)
{
unsigned int features = 0;
@@ -217,6 +221,15 @@ get_available_features (unsigned int ecx, unsigned int edx)
if (ecx & bit_AVX)
features |= (1 << FEATURE_AVX);
+ /* Get Advanced Features at level 7 (eax = 7, ecx = 0). */
+ if (max_cpuid_level >= 7)
+ {
+ unsigned int eax, ebx, ecx, edx;
+ __cpuid_count (7, 0, eax, ebx, ecx, edx);
+ if (ebx & bit_AVX2)
+ features |= (1 << FEATURE_AVX2);
+ }
+
__cpu_model.__cpu_features[0] = features;
}
@@ -296,7 +309,7 @@ __cpu_indicator_init (void)
/* Get CPU type. */
get_intel_cpu (family, model, brand_id);
/* Find available features. */
- get_available_features (ecx, edx);
+ get_available_features (ecx, edx, max_level);
__cpu_model.__cpu_vendor = VENDOR_INTEL;
}
else if (vendor == SIG_AMD)
@@ -311,7 +324,7 @@ __cpu_indicator_init (void)
/* Get CPU type. */
get_amd_cpu (family, model);
/* Find available features. */
- get_available_features (ecx, edx);
+ get_available_features (ecx, edx, max_level);
__cpu_model.__cpu_vendor = VENDOR_AMD;
}
else