diff options
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-37.c | 103 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-38.c | 82 |
2 files changed, 185 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-37.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-37.c new file mode 100644 index 0000000..66e81ea --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-37.c @@ -0,0 +1,103 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ + +#include "riscv_vector.h" + +void +foo (void *in, void *out) +{ + vint16m2_t accum = __riscv_vle16_v_i16m2 (in, 4); + vint16m1_t high_eew16 = __riscv_vget_v_i16m2_i16m1 (accum, 1); + vint8m1_t high_eew8 = __riscv_vreinterpret_v_i16m1_i8m1 (high_eew16); + vint16m2_t result = __riscv_vwmacc_vx_i16m2 (accum, 16, high_eew8, 4); + __riscv_vse16_v_i16m2 (out, result, 4); +} + +void +foo2 (void *in, void *out) +{ + vint16m4_t accum = __riscv_vle16_v_i16m4 (in, 4); + vint16m2_t high_eew16 = __riscv_vget_v_i16m4_i16m2 (accum, 1); + vint8m2_t high_eew8 = __riscv_vreinterpret_v_i16m2_i8m2 (high_eew16); + vint16m4_t result = __riscv_vwmacc_vx_i16m4 (accum, 16, high_eew8, 4); + __riscv_vse16_v_i16m4 (out, result, 4); +} + +void +foo3 (void *in, void *out) +{ + vint16m8_t accum = __riscv_vle16_v_i16m8 (in, 4); + vint16m4_t high_eew16 = __riscv_vget_v_i16m8_i16m4 (accum, 1); + vint8m4_t high_eew8 = __riscv_vreinterpret_v_i16m4_i8m4 (high_eew16); + vint16m8_t result = __riscv_vwmacc_vx_i16m8 (accum, 16, high_eew8, 4); + __riscv_vse16_v_i16m8 (out, result, 4); +} + +void +foo4 (void *in, void *out) +{ + vint16m2_t accum = __riscv_vle16_v_i16m2 (in, 4); + vint16m1_t high_eew16 = __riscv_vget_v_i16m2_i16m1 (accum, 1); + vint8m1_t high_eew8 = __riscv_vreinterpret_v_i16m1_i8m1 (high_eew16); + vint16m2_t result = __riscv_vwmaccus_vx_i16m2 (accum, 16, high_eew8, 4); + __riscv_vse16_v_i16m2 (out, result, 4); +} + +void +foo5 (void *in, void *out) +{ + vint16m4_t accum = __riscv_vle16_v_i16m4 (in, 4); + vint16m2_t high_eew16 = __riscv_vget_v_i16m4_i16m2 (accum, 1); + vint8m2_t high_eew8 = __riscv_vreinterpret_v_i16m2_i8m2 (high_eew16); + vint16m4_t result = __riscv_vwmaccus_vx_i16m4 (accum, 16, high_eew8, 4); + __riscv_vse16_v_i16m4 (out, result, 4); +} + +void +foo6 (void *in, void *out) +{ + vint16m8_t accum = __riscv_vle16_v_i16m8 (in, 4); + vint16m4_t high_eew16 = __riscv_vget_v_i16m8_i16m4 (accum, 1); + vint8m4_t high_eew8 = __riscv_vreinterpret_v_i16m4_i8m4 (high_eew16); + vint16m8_t result = __riscv_vwmaccus_vx_i16m8 (accum, 16, high_eew8, 4); + __riscv_vse16_v_i16m8 (out, result, 4); +} + +void +foo7 (void *in, void *out) +{ + vint16m2_t accum = __riscv_vle16_v_i16m2 (in, 4); + vint16m1_t high_eew16 = __riscv_vget_v_i16m2_i16m1 (accum, 1); + vint8m1_t high_eew8 = __riscv_vreinterpret_v_i16m1_i8m1 (high_eew16); + vuint8m1_t high_ueew8 = __riscv_vreinterpret_v_i8m1_u8m1 (high_eew8); + vint16m2_t result = __riscv_vwmaccsu_vx_i16m2 (accum, 16, high_ueew8, 4); + __riscv_vse16_v_i16m2 (out, result, 4); +} + +void +foo8 (void *in, void *out) +{ + vint16m4_t accum = __riscv_vle16_v_i16m4 (in, 4); + vint16m2_t high_eew16 = __riscv_vget_v_i16m4_i16m2 (accum, 1); + vint8m2_t high_eew8 = __riscv_vreinterpret_v_i16m2_i8m2 (high_eew16); + vuint8m2_t high_ueew8 = __riscv_vreinterpret_v_i8m2_u8m2 (high_eew8); + vint16m4_t result = __riscv_vwmaccsu_vx_i16m4 (accum, 16, high_ueew8, 4); + __riscv_vse16_v_i16m4 (out, result, 4); +} + +void +foo9 (void *in, void *out) +{ + vint16m8_t accum = __riscv_vle16_v_i16m8 (in, 4); + vint16m4_t high_eew16 = __riscv_vget_v_i16m8_i16m4 (accum, 1); + vint8m4_t high_eew8 = __riscv_vreinterpret_v_i16m4_i8m4 (high_eew16); + vuint8m4_t high_ueew8 = __riscv_vreinterpret_v_i8m4_u8m4 (high_eew8); + vint16m8_t result = __riscv_vwmaccsu_vx_i16m8 (accum, 16, high_ueew8, 4); + __riscv_vse16_v_i16m8 (out, result, 4); +} + +/* { dg-final { scan-assembler-not {vmv1r} } } */ +/* { dg-final { scan-assembler-not {vmv2r} { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not {vmv4r} { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not {vmv8r} { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not {csrr} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-38.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-38.c new file mode 100644 index 0000000..a0cf9af --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr112431-38.c @@ -0,0 +1,82 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ + +#include "riscv_vector.h" + +void +foo (void *in, void *out) +{ + vfloat64m2_t accum = __riscv_vle64_v_f64m2 (in, 4); + vfloat64m1_t high_eew64 = __riscv_vget_v_f64m2_f64m1 (accum, 1); + vint64m1_t high_eew64_i = __riscv_vreinterpret_v_f64m1_i64m1 (high_eew64); + vint32m1_t high_eew32_i = __riscv_vreinterpret_v_i64m1_i32m1 (high_eew64_i); + vfloat32m1_t high_eew32 = __riscv_vreinterpret_v_i32m1_f32m1 (high_eew32_i); + vfloat64m2_t result = __riscv_vfwmacc_vf_f64m2 (accum, 64, high_eew32, 4); + __riscv_vse64_v_f64m2 (out, result, 4); +} + +void +foo2 (void *in, void *out) +{ + vfloat64m4_t accum = __riscv_vle64_v_f64m4 (in, 4); + vfloat64m2_t high_eew64 = __riscv_vget_v_f64m4_f64m2 (accum, 1); + vint64m2_t high_eew64_i = __riscv_vreinterpret_v_f64m2_i64m2 (high_eew64); + vint32m2_t high_eew32_i = __riscv_vreinterpret_v_i64m2_i32m2 (high_eew64_i); + vfloat32m2_t high_eew32 = __riscv_vreinterpret_v_i32m2_f32m2 (high_eew32_i); + vfloat64m4_t result = __riscv_vfwmacc_vf_f64m4 (accum, 64, high_eew32, 4); + __riscv_vse64_v_f64m4 (out, result, 4); +} + +void +foo3 (void *in, void *out) +{ + vfloat64m8_t accum = __riscv_vle64_v_f64m8 (in, 4); + vfloat64m4_t high_eew64 = __riscv_vget_v_f64m8_f64m4 (accum, 1); + vint64m4_t high_eew64_i = __riscv_vreinterpret_v_f64m4_i64m4 (high_eew64); + vint32m4_t high_eew32_i = __riscv_vreinterpret_v_i64m4_i32m4 (high_eew64_i); + vfloat32m4_t high_eew32 = __riscv_vreinterpret_v_i32m4_f32m4 (high_eew32_i); + vfloat64m8_t result = __riscv_vfwmacc_vf_f64m8 (accum, 64, high_eew32, 4); + __riscv_vse64_v_f64m8 (out, result, 4); +} + +void +foo4 (void *in, void *out) +{ + vfloat64m2_t accum = __riscv_vle64_v_f64m2 (in, 4); + vfloat64m1_t high_eew64 = __riscv_vget_v_f64m2_f64m1 (accum, 1); + vint64m1_t high_eew64_i = __riscv_vreinterpret_v_f64m1_i64m1 (high_eew64); + vint32m1_t high_eew32_i = __riscv_vreinterpret_v_i64m1_i32m1 (high_eew64_i); + vfloat32m1_t high_eew32 = __riscv_vreinterpret_v_i32m1_f32m1 (high_eew32_i); + vfloat64m2_t result = __riscv_vfwnmsac_vf_f64m2 (accum, 64, high_eew32, 4); + __riscv_vse64_v_f64m2 (out, result, 4); +} + +void +foo5 (void *in, void *out) +{ + vfloat64m4_t accum = __riscv_vle64_v_f64m4 (in, 4); + vfloat64m2_t high_eew64 = __riscv_vget_v_f64m4_f64m2 (accum, 1); + vint64m2_t high_eew64_i = __riscv_vreinterpret_v_f64m2_i64m2 (high_eew64); + vint32m2_t high_eew32_i = __riscv_vreinterpret_v_i64m2_i32m2 (high_eew64_i); + vfloat32m2_t high_eew32 = __riscv_vreinterpret_v_i32m2_f32m2 (high_eew32_i); + vfloat64m4_t result = __riscv_vfwnmsac_vf_f64m4 (accum, 64, high_eew32, 4); + __riscv_vse64_v_f64m4 (out, result, 4); +} + +void +foo6 (void *in, void *out) +{ + vfloat64m8_t accum = __riscv_vle64_v_f64m8 (in, 4); + vfloat64m4_t high_eew64 = __riscv_vget_v_f64m8_f64m4 (accum, 1); + vint64m4_t high_eew64_i = __riscv_vreinterpret_v_f64m4_i64m4 (high_eew64); + vint32m4_t high_eew32_i = __riscv_vreinterpret_v_i64m4_i32m4 (high_eew64_i); + vfloat32m4_t high_eew32 = __riscv_vreinterpret_v_i32m4_f32m4 (high_eew32_i); + vfloat64m8_t result = __riscv_vfwnmsac_vf_f64m8 (accum, 64, high_eew32, 4); + __riscv_vse64_v_f64m8 (out, result, 4); +} + +/* { dg-final { scan-assembler-not {vmv1r} { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not {vmv2r} { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not {vmv4r} { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not {vmv8r} { xfail riscv*-*-* } } } */ +/* { dg-final { scan-assembler-not {csrr} } } */ |