diff options
-rw-r--r-- | gcc/testsuite/ChangeLog | 10 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr72804.c | 19 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr92398.h | 17 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c | 12 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c | 10 | ||||
-rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 20 |
6 files changed, 73 insertions, 15 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 34d5a75..d499052 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,13 @@ +2019-12-02 Luo Xiong Hu <luoxhu@linux.ibm.com> + + testsuite/pr92398 + * gcc.target/powerpc/pr72804.c: Split the store function to... + * gcc.target/powerpc/pr92398.h: ... this one. New. + * gcc.target/powerpc/pr92398.p9+.c: New. + * gcc.target/powerpc/pr92398.p9-.c: New. + * lib/target-supports.exp (check_effective_target_p8): New. + (check_effective_target_p9+): New. + 2019-11-30 Richard Sandiford <richard.sandiford@arm.com> * gcc.target/aarch64/sve/acle/general-c/sizeless-1.c: New test. diff --git a/gcc/testsuite/gcc.target/powerpc/pr72804.c b/gcc/testsuite/gcc.target/powerpc/pr72804.c index 56a2452..d424bcc 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr72804.c +++ b/gcc/testsuite/gcc.target/powerpc/pr72804.c @@ -1,7 +1,6 @@ /* { dg-do compile { target { lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ -/* { dg-options "-O2 -mvsx -fno-inline-functions --param max-inline-insns-single=200" } */ +/* { dg-options "-O2 -mvsx"} */ __int128_t foo (__int128_t *src) @@ -9,17 +8,7 @@ foo (__int128_t *src) return ~*src; } -void -bar (__int128_t *dst, __int128_t src) -{ - *dst = ~src; -} -/* { dg-final { scan-assembler-times "not " 4 } } */ -/* { dg-final { scan-assembler-times "std " 2 } } */ -/* { dg-final { scan-assembler-times "ld " 2 } } */ -/* { dg-final { scan-assembler-not "lxvd2x" } } */ -/* { dg-final { scan-assembler-not "stxvd2x" } } */ -/* { dg-final { scan-assembler-not "xxpermdi" } } */ -/* { dg-final { scan-assembler-not "mfvsrd" } } */ -/* { dg-final { scan-assembler-not "mfvsrd" } } */ +/* { dg-final { scan-assembler-times {\mld\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mnot\M} 2 } } */ +/* { dg-final { scan-assembler-not {\mlxvd2x\M} } }*/ diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.h b/gcc/testsuite/gcc.target/powerpc/pr92398.h new file mode 100644 index 0000000..5a4a8bc --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr92398.h @@ -0,0 +1,17 @@ +/* This test code is included into pr92398.p9-.c and pr92398.p9+.c. + The two files have the tests for the number of instructions generated for + P9- versus P9+. + + store generates difference instructions as below: + P9+: mtvsrdd;xxlnot;stxv. + P8/P7/P6 LE: not;not;std;std. + P8 BE: mtvsrd;mtvsrd;xxpermdi;xxlnor;stxvd2x. + P7/P6 BE: std;std;addi;lxvd2x;xxlnor;stxvd2x. + P9+ and P9- LE are expected, P6/P7/P8 BE are unexpected. */ + +void +bar (__int128_t *dst, __int128_t src) +{ + *dst = ~src; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c b/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c new file mode 100644 index 0000000..a819c3f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr92398.p9+.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target { lp64 && p9+ } } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O2 -mvsx" } */ + +/* { dg-final { scan-assembler-times {\mmtvsrdd\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxxlnor\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mstxv\M} 1 } } */ +/* { dg-final { scan-assembler-not {\mld\M} } } */ +/* { dg-final { scan-assembler-not {\mnot\M} } } */ + +/* Source code for the test in pr92398.h */ +#include "pr92398.h" diff --git a/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c b/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c new file mode 100644 index 0000000..065ae73 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr92398.p9-.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target { lp64 && {! p9+} } } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O2 -mvsx" } */ + +/* { dg-final { scan-assembler-times {\mnot\M} 2 { xfail be } } } */ +/* { dg-final { scan-assembler-times {\mstd\M} 2 { xfail { p8 && be } } } } */ + +/* Source code for the test in pr92398.h */ +#include "pr92398.h" + diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 8f25d33..5b4cc02 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2585,6 +2585,26 @@ proc check_effective_target_le { } { }] } +# Return 1 if we're generating code for only power8 platforms. + +proc check_effective_target_p8 { } { + return [check_no_compiler_messages_nocache p8 assembly { + #if !(!defined(_ARCH_PWR9) && defined(_ARCH_PWR8)) + #error NO + #endif + } ""] +} + +# Return 1 if we're generating code for power9 and future platforms. + +proc check_effective_target_p9+ { } { + return [check_no_compiler_messages_nocache p9+ assembly { + #if !(defined(_ARCH_PWR9)) + #error NO + #endif + } ""] +} + # Return 1 if we're generating 32-bit code using default options, 0 # otherwise. |