diff options
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/convex/convex.c | 72 | ||||
| -rw-r--r-- | gcc/config/convex/convex.h | 66 |
3 files changed, 74 insertions, 69 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8581a29..948f2aa 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2001-11-09 Kazu Hirata <kazu@hxi.com> + + * config/convex/convex.c: Fix comment formatting. + * config/convex/convex.h: Likewise. + 2001-11-08 Zack Weinberg <zack@codesourcery.com> * Makefile.in (.po.pox): Look both in srcdir and builddir diff --git a/gcc/config/convex/convex.c b/gcc/config/convex/convex.c index 6d38831..f77ed67 100644 --- a/gcc/config/convex/convex.c +++ b/gcc/config/convex/convex.c @@ -42,16 +42,16 @@ char regno_ok_for_index_p_base[1 + LAST_VIRTUAL_REGISTER + 1]; enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER]; enum reg_class reg_class_from_letter[256]; -/* Target cpu index. */ +/* Target cpu index. */ int target_cpu; /* Boolean to keep track of whether the current section is .text or not. - Used by .align handler in convex.h. */ + Used by .align handler in convex.h. */ int current_section_is_text; -/* Communication between output_compare and output_condjump. */ +/* Communication between output_compare and output_condjump. */ static rtx cmp_operand0, cmp_operand1; static char cmp_modech; @@ -107,18 +107,18 @@ convex_output_function_prologue (file, size) The function epilogue should not depend on the current stack pointer! It should use the frame pointer only. This is mandatory because of alloca; we also take advantage of it to omit stack - adjustments before returning. */ + adjustments before returning. */ static void convex_output_function_epilogue (file, size) FILE *file; HOST_WIDE_INT size ATTRIBUTE_UNUSED; { - /* Follow function with a zero to stop c34 icache prefetching. */ + /* Follow function with a zero to stop c34 icache prefetching. */ fprintf (file, "\tds.h 0\n"); } -/* Adjust the cost of dependences. */ +/* Adjust the cost of dependences. */ static int convex_adjust_cost (insn, link, dep, cost) rtx insn; @@ -126,7 +126,7 @@ convex_adjust_cost (insn, link, dep, cost) rtx dep; int cost; { - /* Antidependencies don't block issue. */ + /* Antidependencies don't block issue. */ if (REG_NOTE_KIND (link) != 0) cost = 0; /* C38 situations where delay depends on context */ @@ -155,14 +155,14 @@ convex_adjust_cost (insn, link, dep, cost) -/* Here from OVERRIDE_OPTIONS at startup. Initialize constant tables. */ +/* Here from OVERRIDE_OPTIONS at startup. Initialize constant tables. */ void init_convex () { int regno; - /* Set A and S reg classes. */ + /* Set A and S reg classes. */ for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) if (A_REGNO_P (regno)) { @@ -175,7 +175,7 @@ init_convex () regno_reg_class[regno] = S_REGS; } - /* Can't index off the stack pointer, register 0. */ + /* Can't index off the stack pointer, register 0. */ regno_ok_for_index_p[STACK_POINTER_REGNUM] = 0; regno_reg_class[STACK_POINTER_REGNUM] = SP_REGS; @@ -193,7 +193,7 @@ init_convex () reg_class_from_letter['A'] = INDEX_REGS; reg_class_from_letter['d'] = S_REGS; - /* Turn off floating point exception enables in the psw. */ + /* Turn off floating point exception enables in the psw. */ psw_disable_float (); } @@ -212,7 +212,7 @@ psw_disable_float () } /* Here to output code for a compare insn. Output nothing, just - record the operands and their mode. */ + record the operands and their mode. */ const char * output_cmp (operand0, operand1, modech) @@ -250,7 +250,7 @@ output_condjump (label, cond, jbr_sense) /* [BL] mean the value is being compared against immediate 0. Use neg.x, which produces the same carry that eq.x #0 would if it existed. In this case operands[1] is a scratch register, not a - compare operand. */ + compare operand. */ if (cmp_modech == 'B' || cmp_modech == 'L') { @@ -260,7 +260,7 @@ output_condjump (label, cond, jbr_sense) /* [WH] mean the value being compared resulted from "add.[wh] #-1,rk" when rk was nonnegative -- we can omit equality compares against -1 - or inequality compares against 0. */ + or inequality compares against 0. */ else if (cmp_modech == 'W' || cmp_modech == 'H') { @@ -274,7 +274,7 @@ output_condjump (label, cond, jbr_sense) /* Constant must be first; swap operands if necessary. If lt, le, ltu, leu are swapped, change to le, lt, leu, ltu - and reverse the sense of the jump. */ + and reverse the sense of the jump. */ if (! REG_P (cmp_operand1)) { @@ -313,7 +313,7 @@ output_condjump (label, cond, jbr_sense) /* Return 1 if OP is valid for cmpsf. In IEEE mode, +/- zero compares are not handled by the immediate versions of eq.s and on some machines, lt.s, and le.s. - So disallow 0.0 as the immediate operand of xx.s compares in IEEE mode. */ + So disallow 0.0 as the immediate operand of xx.s compares in IEEE mode. */ int nonmemory_cmpsf_operand (op, mode) @@ -329,7 +329,7 @@ nonmemory_cmpsf_operand (op, mode) } /* Convex /bin/as does not like unary minus in some contexts. - Simplify CONST addresses to remove it. */ + Simplify CONST addresses to remove it. */ rtx simplify_for_convex (x) @@ -355,7 +355,7 @@ simplify_for_convex (x) return x; } -/* Routines to separate CONST_DOUBLEs into component parts. */ +/* Routines to separate CONST_DOUBLEs into component parts. */ int const_double_high_int (x) @@ -377,7 +377,7 @@ const_double_low_int (x) return CONST_DOUBLE_LOW (x); } -/* Inline block copy. */ +/* Inline block copy. */ void expand_movstr (operands) @@ -394,16 +394,16 @@ expand_movstr (operands) /* Decide how many regs to use, depending on load latency, and what size pieces to move, depending on whether machine does unaligned - loads and stores efficiently. */ + loads and stores efficiently. */ if (TARGET_C1) { - /* ld.l latency is 4, no alignment problems. */ + /* ld.l latency is 4, no alignment problems. */ nregs = 3, maxsize = 8; } else if (TARGET_C2) { - /* loads are latency 2 if we avoid ld.l not at least word aligned. */ + /* loads are latency 2 if we avoid ld.l not at least word aligned. */ if (align >= 4) nregs = 2, maxsize = 8; else @@ -411,12 +411,12 @@ expand_movstr (operands) } else if (TARGET_C34) { - /* latency is 4 if aligned, horrible if not. */ + /* latency is 4 if aligned, horrible if not. */ nregs = 3, maxsize = align; } else if (TARGET_C38) { - /* latency is 2 if at least word aligned, 3 or 4 if unaligned. */ + /* latency is 2 if at least word aligned, 3 or 4 if unaligned. */ if (align >= 4) nregs = 2, maxsize = 8; else @@ -426,7 +426,7 @@ expand_movstr (operands) abort (); /* Caller is not necessarily prepared for us to fail in this - expansion. So fall back by generating memcpy call here. */ + expansion. So fall back by generating memcpy call here. */ if (GET_CODE (operands[2]) != CONST_INT || (len = INTVAL (operands[2])) > (unsigned) 32 * maxsize) @@ -465,7 +465,7 @@ expand_movstr (operands) store = gen_rtx_SET (VOIDmode, dest, reg); /* Emit the load and the store from last time. - When we emit a store, we can reuse its temp reg. */ + When we emit a store, we can reuse its temp reg. */ emit_insn (load); if (prev_store) { @@ -475,20 +475,20 @@ expand_movstr (operands) else reg = 0; - /* Queue up the store, for next time or the time after that. */ + /* Queue up the store, for next time or the time after that. */ if (nregs == 2) prev_store = store; else prev_store = prev_store_2, prev_store_2 = store; - /* Advance to next piece. */ + /* Advance to next piece. */ size = GET_MODE_SIZE (mode); src = adjust_address (src, mode, size); dest = adjust_address (dest, mode, size); len -= size; } - /* Finally, emit the last stores. */ + /* Finally, emit the last stores. */ if (prev_store) emit_insn (prev_store); if (prev_store_2) @@ -554,7 +554,7 @@ check_float_value (mode, dp, overflow) /* Output the label at the start of a function. Precede it with the number of formal args so debuggers will have - some idea of how many args to print. */ + some idea of how many args to print. */ void asm_declare_function_name (file, name, decl) @@ -591,7 +591,7 @@ asm_declare_function_name (file, name, decl) /* Print an instruction operand X on file FILE. CODE is the code from the %-spec that requested printing this operand; - if `%z3' was used to print operand 3, then CODE is 'z'. */ + if `%z3' was used to print operand 3, then CODE is 'z'. */ /* Convex codes: %u prints a CONST_DOUBLE's high word %v prints a CONST_DOUBLE's low word @@ -670,7 +670,7 @@ print_operand (file, x, code) } } -/* Print a memory operand whose address is X, on file FILE. */ +/* Print a memory operand whose address is X, on file FILE. */ void print_operand_address (file, addr) @@ -718,7 +718,7 @@ print_operand_address (file, addr) } /* Output a float to FILE, value VALUE, format FMT, preceded by PFX - and followed by SFX. */ + and followed by SFX. */ void outfloat (file, value, fmt, pfx, sfx) @@ -743,7 +743,7 @@ outfloat (file, value, fmt, pfx, sfx) void replace_arg_pushes () { - /* Doesn't work yet. */ + /* Doesn't work yet. */ } /* Output the insns needed to do a call. operands[] are @@ -777,11 +777,11 @@ output_call (insn, operands) } -/* Here after reloading, before the second scheduling pass. */ +/* Here after reloading, before the second scheduling pass. */ void emit_ap_optimizations () { - /* Removed for now. */ + /* Removed for now. */ } diff --git a/gcc/config/convex/convex.h b/gcc/config/convex/convex.h index b326c96..a69d9d2 100644 --- a/gcc/config/convex/convex.h +++ b/gcc/config/convex/convex.h @@ -19,7 +19,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* Standard GCC variables that we reference. */ +/* Standard GCC variables that we reference. */ extern int target_flags; @@ -107,7 +107,7 @@ extern int target_flags; /* Target-dependent specs. Some libraries come in c1 and c2+ versions; use the appropriate ones. Make a target-dependent __convex_cxx__ define to relay the target cpu - to the program being compiled. */ + to the program being compiled. */ #if (TARGET_DEFAULT | TARGET_CPU_DEFAULT) & 1 @@ -416,12 +416,12 @@ extern int target_flags; #endif -/* Use /path/libgcc.a instead of -lgcc, makes bootstrap work more smoothly. */ +/* Use /path/libgcc.a instead of -lgcc, makes bootstrap work more smoothly. */ #define LINK_LIBGCC_SPECIAL_1 /* Since IEEE support was added to gcc, most things seem to like it - better if we disable exceptions and check afterward for infinity. */ + better if we disable exceptions and check afterward for infinity. */ #if __convex__ #if _IEEE_FLOAT_ @@ -436,7 +436,7 @@ extern int target_flags; /* Target machine storage layout */ /* Define this if most significant bit is lowest numbered - in instructions that operate on numbered bit-fields. */ + in instructions that operate on numbered bit-fields. */ #define BITS_BIG_ENDIAN 1 /* Define this if most significant byte of a word is the lowest numbered. */ @@ -531,19 +531,19 @@ extern int target_flags; /* List the order in which to allocate registers. Each register must be listed once, even those in FIXED_REGISTERS. - For Convex, put S0 (the return register) last. */ + For Convex, put S0 (the return register) last. */ #define REG_ALLOC_ORDER \ { 1, 2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 0, 8, 14, 15 } /* Return number of consecutive hard regs needed starting at reg REGNO to hold something of mode MODE. This is ordinarily the length in words of a value of mode MODE - but can be less for certain modes in special long registers. */ + but can be less for certain modes in special long registers. */ #define HARD_REGNO_NREGS(REGNO, MODE) \ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. - On Convex, S registers can hold any type, A registers any nonfloat. */ + On Convex, S registers can hold any type, A registers any nonfloat. */ #define HARD_REGNO_MODE_OK(REGNO, MODE) \ (S_REGNO_P (REGNO) \ || (GET_MODE_SIZE (MODE) <= 4 && (MODE) != SFmode)) @@ -608,7 +608,7 @@ extern int target_flags; /* Convex has classes A (address) and S (scalar). A is further divided into SP_REGS (stack pointer) and INDEX_REGS. - SI_REGS is S_REGS + INDEX_REGS -- all the regs except SP. */ + SI_REGS is S_REGS + INDEX_REGS -- all the regs except SP. */ enum reg_class { NO_REGS, S_REGS, INDEX_REGS, SP_REGS, A_REGS, SI_REGS, @@ -667,7 +667,7 @@ enum reg_class { C is the letter, and VALUE is a constant value. Return 1 if VALUE is in the range specified by C. */ /* 'I' is used to pass any CONST_INT and reject any CONST_DOUBLE. - CONST_DOUBLE integers are handled by G and H constraint chars. */ + CONST_DOUBLE integers are handled by G and H constraint chars. */ #define CONST_OK_FOR_LETTER_P(VALUE, C) 1 @@ -689,7 +689,7 @@ enum reg_class { /* Optional extra constraints for this machine. For Convex, 'Q' means that OP is a volatile MEM. - For volatile scalars, we use instructions that bypass the data cache. */ + For volatile scalars, we use instructions that bypass the data cache. */ #define EXTRA_CONSTRAINT(OP, C) \ ((C) == 'Q' ? (GET_CODE (OP) == MEM && MEM_VOLATILE_P (OP) \ @@ -701,7 +701,7 @@ enum reg_class { In general this is just CLASS; but on some machines in some cases it is preferable to use a more restrictive class. */ -/* Put 2-word constants that can't be immediate operands into memory. */ +/* Put 2-word constants that can't be immediate operands into memory. */ #define PREFERRED_RELOAD_CLASS(X,CLASS) \ ((GET_CODE (X) != CONST_DOUBLE \ @@ -734,7 +734,7 @@ enum reg_class { #define STARTING_FRAME_OFFSET 0 /* If we generate an insn to push BYTES bytes, - this says how many the stack pointer really advances by. */ + this says how many the stack pointer really advances by. */ #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3) /* Offset of first parameter from the argument pointer register value. */ @@ -772,7 +772,7 @@ enum reg_class { #define FUNCTION_VALUE_REGNO_P(N) ((N) == S0_REGNUM) -/* 1 if N is a possible register number for function argument passing. */ +/* 1 if N is a possible register number for function argument passing. */ #define FUNCTION_ARG_REGNO_P(N) 0 @@ -780,14 +780,14 @@ enum reg_class { during the scan of that argument list. This data type should hold all necessary information about the function itself and about the args processed so far, enough to enable macros - such as FUNCTION_ARG to determine where the next arg should go. */ -/* On convex, simply count the arguments in case TARGET_ARGCOUNT is set. */ + such as FUNCTION_ARG to determine where the next arg should go. */ +/* On convex, simply count the arguments in case TARGET_ARGCOUNT is set. */ #define CUMULATIVE_ARGS int /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a function whose data type is FNTYPE. - For a library call, FNTYPE is 0. */ + For a library call, FNTYPE is 0. */ #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ ((CUM) = 0) @@ -906,7 +906,7 @@ enum reg_class { /* Nonzero if the constant value X is a legitimate general operand. It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ -/* For convex, bounce 2-word constants that can't be immediate operands. */ +/* For convex, bounce 2-word constants that can't be immediate operands. */ #define LEGITIMATE_CONSTANT_P(X) \ (GET_CODE (X) != CONST_DOUBLE \ @@ -958,7 +958,7 @@ enum reg_class { const, reg, (PLUS reg const) We don't use indirection since with insn scheduling, load + indexing - is better. */ + is better. */ /* 1 if X is an address that we could indirect through. */ #define INDIRECTABLE_ADDRESS_P(X) \ @@ -973,7 +973,7 @@ enum reg_class { && REG_OK_FOR_BASE_P (XEXP (X, 1)) \ && CONSTANT_ADDRESS_P (XEXP (X, 0)))) -/* Go to ADDR if X is a valid address. */ +/* Go to ADDR if X is a valid address. */ #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ { register rtx xfoob = (X); \ if (INDIRECTABLE_ADDRESS_P (xfoob)) \ @@ -1000,7 +1000,7 @@ enum reg_class { #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {} /* Go to LABEL if ADDR (a legitimate address expression) - has an effect that depends on the machine mode it is used for. */ + has an effect that depends on the machine mode it is used for. */ #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {} @@ -1011,7 +1011,7 @@ enum reg_class { /* Define as C expression which evaluates to nonzero if the tablejump instruction expects the table to contain offsets from the address of the table. - Do not define this if the table should contain absolute addresses. */ + Do not define this if the table should contain absolute addresses. */ /* #define CASE_VECTOR_PC_RELATIVE 1 */ /* Define this if the case instruction drops through after the table @@ -1052,7 +1052,7 @@ enum reg_class { #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 /* On Convex, it is as good to call a constant function address as to - call an address kept in a register. */ + call an address kept in a register. */ #define NO_FUNCTION_CSE /* When a prototype says `char' or `short', really pass an `int'. */ @@ -1116,7 +1116,7 @@ enum reg_class { #define BRANCH_COST 0 /* Convex uses VAX or IEEE floats. - Follow the host format. */ + Follow the host format. */ #define TARGET_FLOAT_FORMAT HOST_FLOAT_FORMAT /* But must prevent real.c from constructing VAX dfloats */ @@ -1204,7 +1204,7 @@ enum reg_class { #define DBX_DEBUGGING_INFO -/* How to renumber registers for dbx and gdb. */ +/* How to renumber registers for dbx and gdb. */ #define DBX_REGISTER_NUMBER(REGNO) (REGNO) @@ -1217,7 +1217,7 @@ enum reg_class { #define DBX_CONTIN_CHAR '?' -/* Don't use stab extensions until GDB v4 port is available for convex. */ +/* Don't use stab extensions until GDB v4 port is available for convex. */ #define DEFAULT_GDB_EXTENSIONS 0 #define DBX_NO_XREFS @@ -1234,7 +1234,7 @@ enum reg_class { #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) -/* The prefix to add to user-visible assembler symbols. */ +/* The prefix to add to user-visible assembler symbols. */ #define USER_LABEL_PREFIX "_" @@ -1342,7 +1342,7 @@ enum reg_class { S_REGNO_P (REGNO) ? 'l' : 'w', \ reg_names[REGNO]) -/* This is how to output an element of a case-vector that is absolute. */ +/* This is how to output an element of a case-vector that is absolute. */ #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ fprintf (FILE, "\tds.w L%d\n", VALUE) @@ -1383,19 +1383,19 @@ enum reg_class { ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) -/* Output an arg count before function entries. */ +/* Output an arg count before function entries. */ #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ asm_declare_function_name (FILE, NAME, DECL) /* Print an instruction operand X on file FILE. CODE is the code from the %-spec that requested printing this operand; - if `%z3' was used to print operand 3, then CODE is 'z'. */ + if `%z3' was used to print operand 3, then CODE is 'z'. */ #define PRINT_OPERAND(FILE, X, CODE) \ print_operand (FILE, X, CODE) -/* Print a memory operand whose address is X, on file FILE. */ +/* Print a memory operand whose address is X, on file FILE. */ #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ print_operand_address (FILE, ADDR) @@ -1406,7 +1406,7 @@ enum reg_class { #define FASCIST_ASSEMBLER /* __gcc_cleanup is loader-aliased to __ap$do_registered_functions if we - are linking against standard libc, 0 if old (-traditional) libc. */ + are linking against standard libc, 0 if old (-traditional) libc. */ #define EXIT_BODY \ { \ @@ -1417,7 +1417,7 @@ enum reg_class { } /* Header for convex.c. - Here at the end so we can use types defined above. */ + Here at the end so we can use types defined above. */ extern int target_cpu; extern int current_section_is_text; |