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-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/arm/arm.md6
2 files changed, 9 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 001a0c6..beb2ced 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2002-09-20 Jeroen Dobbelaere <jeroen.dobbelaere@acunia.com>
+
+ * config/arm/arm.md (sign_extract_onebit, not_signextract_onebit):
+ Add clobber of the condition code register.
+
2002-09-20 Richard Henderson <rth@redhat.com>
* real.c (do_fix_trunc): Static.
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index a830462..266d075 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8869,7 +8869,8 @@
[(set (match_operand:SI 0 "s_register_operand" "=r")
(sign_extract:SI (match_operand:SI 1 "s_register_operand" "r")
(const_int 1)
- (match_operand:SI 2 "const_int_operand" "n")))]
+ (match_operand:SI 2 "const_int_operand" "n")))
+ (clobber (reg:CC CC_REGNUM))]
"TARGET_ARM"
"*
operands[2] = GEN_INT (1 << INTVAL (operands[2]));
@@ -8885,7 +8886,8 @@
(not:SI
(sign_extract:SI (match_operand:SI 1 "s_register_operand" "r")
(const_int 1)
- (match_operand:SI 2 "const_int_operand" "n"))))]
+ (match_operand:SI 2 "const_int_operand" "n"))))
+ (clobber (reg:CC CC_REGNUM))]
"TARGET_ARM"
"*
operands[2] = GEN_INT (1 << INTVAL (operands[2]));