diff options
| -rw-r--r-- | gcc/doc/sourcebuild.texi | 20 | ||||
| -rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 2 |
2 files changed, 21 insertions, 1 deletions
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index f7c6936..65b2e55 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -2199,6 +2199,26 @@ PowerPC target supports executing AltiVec instructions. @item vsx_hw PowerPC target supports executing VSX instructions (ISA 2.06). + +@item has_arch_pwr5 +PowerPC target pre-defines macro _ARCH_PWR5 which means the @code{-mcpu} +setting is Power5 or later. + +@item has_arch_pwr6 +PowerPC target pre-defines macro _ARCH_PWR6 which means the @code{-mcpu} +setting is Power6 or later. + +@item has_arch_pwr7 +PowerPC target pre-defines macro _ARCH_PWR7 which means the @code{-mcpu} +setting is Power7 or later. + +@item has_arch_pwr8 +PowerPC target pre-defines macro _ARCH_PWR8 which means the @code{-mcpu} +setting is Power8 or later. + +@item has_arch_pwr9 +PowerPC target pre-defines macro _ARCH_PWR9 which means the @code{-mcpu} +setting is Power9 or later. @end table @subsubsection Other hardware attributes diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 46e8cdd..e106278 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -7085,7 +7085,7 @@ proc check_effective_target_vect_fully_masked { } { # @code{len_store} optabs. proc check_effective_target_vect_len_load_store { } { - return 0 + return [check_effective_target_has_arch_pwr9] } # Return the value of parameter vect-partial-vector-usage specified for |