diff options
| -rw-r--r-- | gcc/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/config/cris/cris.c | 6 | ||||
| -rw-r--r-- | gcc/config/cris/sync.md | 12 |
3 files changed, 21 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1342b2d..7ecc132 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2012-06-09 Hans-Peter Nilsson <hp@axis.com> + + Fix CRIS build errors with --enable-build-with-cxx. + * config/cris/cris.c (cris_emit_trap_for_misalignment): Rename + variable "and" to "andop". + * config/cris/sync.md ("atomic_fetch_<atomic_op_name><mode>"): Use + temporary variable for memory model, passing C++-type-correct + parameter type to expand_mem_thread_fence. + ("atomic_compare_and_swap<mode>"): Ditto. + 2012-06-09 Richard Henderson <rth@redhat.com> PR c++/53602 diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c index 947a6a5..f5bd6db 100644 --- a/gcc/config/cris/cris.c +++ b/gcc/config/cris/cris.c @@ -1929,7 +1929,7 @@ cris_simple_epilogue (void) void cris_emit_trap_for_misalignment (rtx mem) { - rtx addr, reg, ok_label, and, jmp; + rtx addr, reg, ok_label, andop, jmp; int natural_alignment; gcc_assert (MEM_P (mem)); @@ -1941,8 +1941,8 @@ cris_emit_trap_for_misalignment (rtx mem) /* This will yield a btstq without a separate register used, usually - with the exception for PRE hoisting the "and" but not the branch around the trap: see gcc.dg/target/cris/sync-3s.c. */ - and = gen_rtx_AND (Pmode, reg, GEN_INT (natural_alignment - 1)); - emit_cmp_and_jump_insns (force_reg (SImode, and), const0_rtx, EQ, + andop = gen_rtx_AND (Pmode, reg, GEN_INT (natural_alignment - 1)); + emit_cmp_and_jump_insns (force_reg (SImode, andop), const0_rtx, EQ, NULL_RTX, Pmode, 1, ok_label); jmp = get_last_insn (); gcc_assert (JUMP_P (jmp)); diff --git a/gcc/config/cris/sync.md b/gcc/config/cris/sync.md index 6acd2b6..d0cc3b2 100644 --- a/gcc/config/cris/sync.md +++ b/gcc/config/cris/sync.md @@ -88,14 +88,16 @@ (atomic_op:BWD (match_dup 0) (match_dup 1))] "" { + enum memmodel mmodel = (enum memmodel) INTVAL (operands[3]); + if (<MODE>mode != QImode && TARGET_TRAP_UNALIGNED_ATOMIC) cris_emit_trap_for_misalignment (operands[1]); - expand_mem_thread_fence (INTVAL (operands[3])); + expand_mem_thread_fence (mmodel); emit_insn (gen_cris_atomic_fetch_<atomic_op_name><mode>_1 (operands[0], operands[1], operands[2])); - expand_mem_thread_fence (INTVAL (operands[3])); + expand_mem_thread_fence (mmodel); DONE; }) @@ -189,16 +191,18 @@ (match_operand 7)] "" { + enum memmodel mmodel = (enum memmodel) INTVAL (operands[6]); + if (<MODE>mode != QImode && TARGET_TRAP_UNALIGNED_ATOMIC) cris_emit_trap_for_misalignment (operands[2]); - expand_mem_thread_fence (INTVAL (operands[6])); + expand_mem_thread_fence (mmodel); emit_insn (gen_cris_atomic_compare_and_swap<mode>_1 (operands[0], operands[1], operands[2], operands[3], operands[4])); - expand_mem_thread_fence (INTVAL (operands[6])); + expand_mem_thread_fence (mmodel); DONE; }) |