diff options
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/spu/spu.md | 10 |
2 files changed, 12 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0501ae7..04ff2e8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2007-08-03 Ben Elliston <bje@au.ibm.com> + + * config/spu/spu.md (dftsv, dftsv_celledp): Attach the appropriate + mode to unspec expressions to silence a warning from the generator + programs. + 2007-08-02 Steve Ellcey <sje@cup.hp.com> * config/ia64/constraints.md ("U"): Make constraint vector only. diff --git a/gcc/config/spu/spu.md b/gcc/config/spu/spu.md index a7946ed..4f2c41a 100644 --- a/gcc/config/spu/spu.md +++ b/gcc/config/spu/spu.md @@ -3025,16 +3025,18 @@ selb\t%0,%4,%0,%3" ;; dftsv (define_insn "dftsv_celledp" [(set (match_operand:V2DI 0 "spu_reg_operand" "=r") - (unspec [(match_operand:V2DF 1 "spu_reg_operand" "r") - (match_operand:SI 2 "const_int_operand" "i")] UNSPEC_DFTSV))] + (unspec:V2DI [(match_operand:V2DF 1 "spu_reg_operand" "r") + (match_operand:SI 2 "const_int_operand" "i")] + UNSPEC_DFTSV))] "spu_arch == PROCESSOR_CELLEDP" "dftsv\t%0,%1,%2" [(set_attr "type" "fpd")]) (define_expand "dftsv" [(set (match_operand:V2DI 0 "spu_reg_operand" "=r") - (unspec [(match_operand:V2DF 1 "spu_reg_operand" "r") - (match_operand:SI 2 "const_int_operand" "i")] UNSPEC_DFTSV))] + (unspec:V2DI [(match_operand:V2DF 1 "spu_reg_operand" "r") + (match_operand:SI 2 "const_int_operand" "i")] + UNSPEC_DFTSV))] "" { if(spu_arch == PROCESSOR_CELL) |