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-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/doc/sourcebuild.texi4
-rw-r--r--gcc/testsuite/ChangeLog7
-rw-r--r--gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c10
-rw-r--r--gcc/testsuite/lib/target-supports.exp13
5 files changed, 33 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0308f35..f3fe4f6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2018-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * doc/sourcebuild.texi (arm_softfloat): Document.
+
2018-01-21 John David Anglin <danglin@gcc.gnu.org>
PR gcc/77734
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index f0233c9..69fbf6a 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1650,6 +1650,10 @@ ARM target adheres to the VFP and Advanced SIMD Register Arguments
variant of the ABI for the ARM Architecture (as selected with
@code{-mfloat-abi=hard}).
+@item arm_softfloat
+ARM target uses the soft-float ABI with no floating-point instructions
+used whatsoever (as selected with @code{-mfloat-abi=soft}).
+
@item arm_hard_vfp_ok
ARM target supports @code{-mfpu=vfp -mfloat-abi=hard}.
Some multilibs may be incompatible with these options.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 8937561..a63fa4a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2018-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * lib/target-supports.exp (check_effective_target_arm_softfloat):
+ New procedure.
+ * gcc.target/arm/copysign_softfloat_1.c: Allow running everywhere.
+ Adjust scan-assembler checks for soft-float.
+
2018-01-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/83946
diff --git a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
index d79d014..fdbeead 100644
--- a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
+++ b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
@@ -1,8 +1,8 @@
/* { dg-do run } */
/* { dg-require-effective-target arm_thumb2_ok } */
-/* { dg-require-effective-target arm_soft_ok } */
-/* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=softfp" "-mfloat-abi=hard" } { "" } } */
-/* { dg-options "-O2 -mfloat-abi=soft --save-temps" } */
+/* { dg-add-options arm_arch_v6t2 } */
+/* { dg-additional-options "-O2 --save-temps" } */
+
extern void abort (void);
#define N 16
@@ -42,8 +42,8 @@ main (int argc, char **argv)
{
int index = 0;
-/* { dg-final { scan-assembler-times "bfi" 2 } } */
-/* { dg-final { scan-assembler-times "lsr" 1 } } */
+/* { dg-final { scan-assembler-times "bfi" 2 { target arm_softfloat } } } */
+/* { dg-final { scan-assembler-times "lsr" 1 { target arm_softfloat } } } */
for (index; index < N; index++)
{
if (__builtin_copysignf (a_f[index], b_f[index]) != c_f[index])
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index b4b6f32..720914b 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -4885,6 +4885,19 @@ proc check_effective_target_arm_hf_eabi { } {
}]
}
+# Return 1 if this is an ARM target that uses the soft float ABI
+# with no floating-point instructions at all (e.g. -mfloat-abi=soft).
+
+proc check_effective_target_arm_softfloat { } {
+ return [check_no_compiler_messages arm_softfloat object {
+ #if !defined(__SOFTFP__)
+ #error not soft-float EABI
+ #else
+ int dummy;
+ #endif
+ }]
+}
+
# Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
# Some multilibs may be incompatible with this option.