diff options
| -rw-r--r-- | gcc/ChangeLog | 16 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 66 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 5 |
3 files changed, 76 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c756191..ba84c32 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -7,6 +7,22 @@ Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> + * config/i386/i386.c (ix86_expand_vector_init_duplicate): Handle V64QI + and V32HI modes, update V8HI, V16QI, V32QI modes handling. + (ix86_expand_vector_init_general): Handle V64QI and V32HI modes. + * config/i386/sse.md (define_mode_iterator VI48F_512): Rename to ... + (define_mode_iterator VF48_I1248): ... this. Extend to AVX-512 modes. + (define_expand "vec_init<mode>"): Use VF48_I1248. + +2014-10-17 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + * config/i386/i386.c (ix86_expand_sse2_mulvxdi3): Extend expand_sse2_mulvxdi3. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 52b411f..7040200 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -39764,6 +39764,8 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, enum machine_mode mode, case V8SFmode: case V8SImode: case V2DFmode: + case V64QImode: + case V32HImode: case V2DImode: case V4SFmode: case V4SImode: @@ -39794,6 +39796,9 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, enum machine_mode mode, goto widen; case V8HImode: + if (TARGET_AVX512VL && TARGET_AVX512BW) + return ix86_vector_duplicate_value (mode, target, val); + if (TARGET_SSE2) { struct expand_vec_perm_d dperm; @@ -39824,6 +39829,9 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, enum machine_mode mode, goto widen; case V16QImode: + if (TARGET_AVX512VL && TARGET_AVX512BW) + return ix86_vector_duplicate_value (mode, target, val); + if (TARGET_SSE2) goto permute; goto widen; @@ -39853,16 +39861,19 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, enum machine_mode mode, case V16HImode: case V32QImode: - { - enum machine_mode hvmode = (mode == V16HImode ? V8HImode : V16QImode); - rtx x = gen_reg_rtx (hvmode); + if (TARGET_AVX512VL && TARGET_AVX512BW) + return ix86_vector_duplicate_value (mode, target, val); + else + { + enum machine_mode hvmode = (mode == V16HImode ? V8HImode : V16QImode); + rtx x = gen_reg_rtx (hvmode); - ok = ix86_expand_vector_init_duplicate (false, hvmode, x, val); - gcc_assert (ok); + ok = ix86_expand_vector_init_duplicate (false, hvmode, x, val); + gcc_assert (ok); - x = gen_rtx_VEC_CONCAT (mode, x, x); - emit_insn (gen_rtx_SET (VOIDmode, target, x)); - } + x = gen_rtx_VEC_CONCAT (mode, x, x); + emit_insn (gen_rtx_SET (VOIDmode, target, x)); + } return true; default: @@ -40424,8 +40435,9 @@ static void ix86_expand_vector_init_general (bool mmx_ok, enum machine_mode mode, rtx target, rtx vals) { - rtx ops[64], op0, op1; + rtx ops[64], op0, op1, op2, op3, op4, op5; enum machine_mode half_mode = VOIDmode; + enum machine_mode quarter_mode = VOIDmode; int n, i; switch (mode) @@ -40476,6 +40488,42 @@ half: gen_rtx_VEC_CONCAT (mode, op0, op1))); return; + case V64QImode: + quarter_mode = V16QImode; + half_mode = V32QImode; + goto quarter; + + case V32HImode: + quarter_mode = V8HImode; + half_mode = V16HImode; + goto quarter; + +quarter: + n = GET_MODE_NUNITS (mode); + for (i = 0; i < n; i++) + ops[i] = XVECEXP (vals, 0, i); + op0 = gen_reg_rtx (quarter_mode); + op1 = gen_reg_rtx (quarter_mode); + op2 = gen_reg_rtx (quarter_mode); + op3 = gen_reg_rtx (quarter_mode); + op4 = gen_reg_rtx (half_mode); + op5 = gen_reg_rtx (half_mode); + ix86_expand_vector_init_interleave (quarter_mode, op0, ops, + n >> 3); + ix86_expand_vector_init_interleave (quarter_mode, op1, + &ops [n >> 2], n >> 3); + ix86_expand_vector_init_interleave (quarter_mode, op2, + &ops [n >> 1], n >> 3); + ix86_expand_vector_init_interleave (quarter_mode, op3, + &ops [(n >> 1) | (n >> 2)], n >> 3); + emit_insn (gen_rtx_SET (VOIDmode, op4, + gen_rtx_VEC_CONCAT (half_mode, op0, op1))); + emit_insn (gen_rtx_SET (VOIDmode, op5, + gen_rtx_VEC_CONCAT (half_mode, op2, op3))); + emit_insn (gen_rtx_SET (VOIDmode, target, + gen_rtx_VEC_CONCAT (mode, op4, op5))); + return; + case V16QImode: if (!TARGET_SSE4_1) break; diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index dcb53df..f5ad23c 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -524,7 +524,8 @@ (V16SI "TARGET_AVX512F") (V16SF "TARGET_AVX512F") (V8DI "TARGET_AVX512F") (V8DF "TARGET_AVX512F") (V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")]) -(define_mode_iterator VI48F_512 [V16SI V16SF V8DI V8DF]) +(define_mode_iterator VF48_I1248 + [V16SI V16SF V8DI V8DF V32HI V64QI]) (define_mode_iterator VI48F [V16SI V16SF V8DI V8DF (V8SI "TARGET_AVX512VL") (V8SF "TARGET_AVX512VL") @@ -17475,7 +17476,7 @@ }) (define_expand "vec_init<mode>" - [(match_operand:VI48F_512 0 "register_operand") + [(match_operand:VF48_I1248 0 "register_operand") (match_operand 1)] "TARGET_AVX512F" { |