diff options
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 52 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/avx2-pr94460.c | 31 |
4 files changed, 70 insertions, 26 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0847c48..7083bbb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2020-04-03 Jakub Jelinek <jakub@redhat.com> + + PR target/94460 + * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3, + avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do + second half of first lane from first lane of second operand and + first half of second lane from second lane of first operand. + 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com> * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index fba91b7..24b3acd 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -16060,22 +16060,6 @@ (vec_concat:V4HI (vec_concat:V2HI (ssse3_plusminus:HI - (vec_select:HI (match_dup 1) (parallel [(const_int 8)])) - (vec_select:HI (match_dup 1) (parallel [(const_int 9)]))) - (ssse3_plusminus:HI - (vec_select:HI (match_dup 1) (parallel [(const_int 10)])) - (vec_select:HI (match_dup 1) (parallel [(const_int 11)])))) - (vec_concat:V2HI - (ssse3_plusminus:HI - (vec_select:HI (match_dup 1) (parallel [(const_int 12)])) - (vec_select:HI (match_dup 1) (parallel [(const_int 13)]))) - (ssse3_plusminus:HI - (vec_select:HI (match_dup 1) (parallel [(const_int 14)])) - (vec_select:HI (match_dup 1) (parallel [(const_int 15)])))))) - (vec_concat:V8HI - (vec_concat:V4HI - (vec_concat:V2HI - (ssse3_plusminus:HI (vec_select:HI (match_operand:V16HI 2 "nonimmediate_operand" "xm") (parallel [(const_int 0)])) @@ -16089,7 +16073,23 @@ (vec_select:HI (match_dup 2) (parallel [(const_int 5)]))) (ssse3_plusminus:HI (vec_select:HI (match_dup 2) (parallel [(const_int 6)])) - (vec_select:HI (match_dup 2) (parallel [(const_int 7)]))))) + (vec_select:HI (match_dup 2) (parallel [(const_int 7)])))))) + (vec_concat:V8HI + (vec_concat:V4HI + (vec_concat:V2HI + (ssse3_plusminus:HI + (vec_select:HI (match_dup 1) (parallel [(const_int 8)])) + (vec_select:HI (match_dup 1) (parallel [(const_int 9)]))) + (ssse3_plusminus:HI + (vec_select:HI (match_dup 1) (parallel [(const_int 10)])) + (vec_select:HI (match_dup 1) (parallel [(const_int 11)])))) + (vec_concat:V2HI + (ssse3_plusminus:HI + (vec_select:HI (match_dup 1) (parallel [(const_int 12)])) + (vec_select:HI (match_dup 1) (parallel [(const_int 13)]))) + (ssse3_plusminus:HI + (vec_select:HI (match_dup 1) (parallel [(const_int 14)])) + (vec_select:HI (match_dup 1) (parallel [(const_int 15)]))))) (vec_concat:V4HI (vec_concat:V2HI (ssse3_plusminus:HI @@ -16224,21 +16224,21 @@ (vec_select:SI (match_dup 1) (parallel [(const_int 3)])))) (vec_concat:V2SI (plusminus:SI - (vec_select:SI (match_dup 1) (parallel [(const_int 4)])) - (vec_select:SI (match_dup 1) (parallel [(const_int 5)]))) - (plusminus:SI - (vec_select:SI (match_dup 1) (parallel [(const_int 6)])) - (vec_select:SI (match_dup 1) (parallel [(const_int 7)]))))) - (vec_concat:V4SI - (vec_concat:V2SI - (plusminus:SI (vec_select:SI (match_operand:V8SI 2 "nonimmediate_operand" "xm") (parallel [(const_int 0)])) (vec_select:SI (match_dup 2) (parallel [(const_int 1)]))) (plusminus:SI (vec_select:SI (match_dup 2) (parallel [(const_int 2)])) - (vec_select:SI (match_dup 2) (parallel [(const_int 3)])))) + (vec_select:SI (match_dup 2) (parallel [(const_int 3)]))))) + (vec_concat:V4SI + (vec_concat:V2SI + (plusminus:SI + (vec_select:SI (match_dup 1) (parallel [(const_int 4)])) + (vec_select:SI (match_dup 1) (parallel [(const_int 5)]))) + (plusminus:SI + (vec_select:SI (match_dup 1) (parallel [(const_int 6)])) + (vec_select:SI (match_dup 1) (parallel [(const_int 7)])))) (vec_concat:V2SI (plusminus:SI (vec_select:SI (match_dup 2) (parallel [(const_int 4)])) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0a08024..67a14db 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2020-04-03 Jakub Jelinek <jakub@redhat.com> + + PR target/94460 + * gcc.target/i386/avx2-pr94460.c: New test. + 2020-04-03 Patrick Palka <ppalka@redhat.com> PR c++/93211 diff --git a/gcc/testsuite/gcc.target/i386/avx2-pr94460.c b/gcc/testsuite/gcc.target/i386/avx2-pr94460.c new file mode 100644 index 0000000..75b7a7b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx2-pr94460.c @@ -0,0 +1,31 @@ +/* PR target/94460 */ +/* { dg-do run { target { avx2 && int128 } } } */ +/* { dg-options "-O2 -mavx2" } */ + +#include <x86intrin.h> +#include "avx2-check.h" + +typedef __int128 v2ti __attribute__ ((__vector_size__ (32))); + +static inline v2ti +foo (__v16hi b) +{ + return (v2ti) _mm256_hsub_epi16 ((__m256i) b, (__m256i) b); +} + +static inline v2ti +bar (__v8si b) +{ + return (v2ti) _mm256_hsub_epi32 ((__m256i) b, (__m256i) b); +} + +static void +avx2_test (void) +{ + v2ti x = foo ((__v16hi) { 1 }); + if (x[0] != ((__int128)1 << 64 | 1) || x[1] != 0) + abort (); + x = bar ((__v8si) { 1 }); + if (x[0] != ((__int128)1 << 64 | 1) || x[1] != 0) + abort (); +} |