diff options
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 24 |
2 files changed, 21 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 84cc51f..21d2977 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2019-06-28 Michael Meissner <meissner@linux.ibm.com> + + PR target/91009 + * config/rs6000/rs6000.md (floatsi<mode>2_lfiwax): Add non-VSX + alternative. + (floatsi<mode>2_lfiwax_mem): Add non-VSX alternative. + (floatunssi<mode>2_lfiwzx): Add non-VSX alternative. + (floatunssi<mode>2_lfiwzx_mem): Add non-VSX alternative. + 2019-06-28 Iain Sandoe <iain@sandoe.co.uk> * config.gcc (powerpc-*-darwin*, powerpc64-*-darwin*): Remove diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 1b4a43e..5947a43 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -5232,9 +5232,9 @@ ; not be needed and also in case the insns are deleted as dead code. (define_insn_and_split "floatsi<mode>2_lfiwax" - [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Fv>") - (float:SFDF (match_operand:SI 1 "nonimmediate_operand" "r"))) - (clobber (match_scratch:DI 2 "=wa"))] + [(set (match_operand:SFDF 0 "gpc_reg_operand" "=d,<Fv>") + (float:SFDF (match_operand:SI 1 "nonimmediate_operand" "r,r"))) + (clobber (match_scratch:DI 2 "=d,wa"))] "TARGET_HARD_FLOAT && TARGET_LFIWAX && <SI_CONVERT_FP> && can_create_pseudo_p ()" "#" @@ -5271,11 +5271,11 @@ (set_attr "type" "fpload")]) (define_insn_and_split "floatsi<mode>2_lfiwax_mem" - [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Fv>") + [(set (match_operand:SFDF 0 "gpc_reg_operand" "=d,<Fv>") (float:SFDF (sign_extend:DI - (match_operand:SI 1 "indexed_or_indirect_operand" "Z")))) - (clobber (match_scratch:DI 2 "=wa"))] + (match_operand:SI 1 "indexed_or_indirect_operand" "Z,Z")))) + (clobber (match_scratch:DI 2 "=d,wa"))] "TARGET_HARD_FLOAT && TARGET_LFIWAX && <SI_CONVERT_FP>" "#" "" @@ -5308,9 +5308,9 @@ (set_attr "isa" "*,p8v,p8v,p9v")]) (define_insn_and_split "floatunssi<mode>2_lfiwzx" - [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Fv>") - (unsigned_float:SFDF (match_operand:SI 1 "nonimmediate_operand" "r"))) - (clobber (match_scratch:DI 2 "=wa"))] + [(set (match_operand:SFDF 0 "gpc_reg_operand" "=d,<Fv>") + (unsigned_float:SFDF (match_operand:SI 1 "nonimmediate_operand" "r,r"))) + (clobber (match_scratch:DI 2 "=d,wa"))] "TARGET_HARD_FLOAT && TARGET_LFIWZX && <SI_CONVERT_FP>" "#" "" @@ -5346,11 +5346,11 @@ (set_attr "type" "fpload")]) (define_insn_and_split "floatunssi<mode>2_lfiwzx_mem" - [(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Fv>") + [(set (match_operand:SFDF 0 "gpc_reg_operand" "=d,<Fv>") (unsigned_float:SFDF (zero_extend:DI - (match_operand:SI 1 "indexed_or_indirect_operand" "Z")))) - (clobber (match_scratch:DI 2 "=wa"))] + (match_operand:SI 1 "indexed_or_indirect_operand" "Z,Z")))) + (clobber (match_scratch:DI 2 "=d,wa"))] "TARGET_HARD_FLOAT && TARGET_LFIWZX && <SI_CONVERT_FP>" "#" "" |