diff options
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/pr53447-5.c | 7 |
2 files changed, 9 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8006634..57b8efd 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2016-11-22 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * gcc.target/arm/pr53447-5.c: Fix test expectations for neon-fpu. + 2016-11-22 Georg-Johann Lay <avr@gjlay.de> * c-c++-common/builtin-shuffle-1.c (V): Use 4 * int in vector. diff --git a/gcc/testsuite/gcc.target/arm/pr53447-5.c b/gcc/testsuite/gcc.target/arm/pr53447-5.c index 35988f4..da91811 100644 --- a/gcc/testsuite/gcc.target/arm/pr53447-5.c +++ b/gcc/testsuite/gcc.target/arm/pr53447-5.c @@ -15,5 +15,8 @@ void foo(long long* p) p[9] -= p[10]; } -/* { dg-final { scan-assembler-times "ldrd" 10 } } */ -/* { dg-final { scan-assembler-times "strd" 9 } } */ +/* We accept neon instructions vldr.64 and vstr.64 as well. + Note: DejaGnu counts patterns with alternatives twice, + so actually there are only 10 loads and 9 stores. */ +/* { dg-final { scan-assembler-times "(ldrd|vldr\\.64)" 20 } } */ +/* { dg-final { scan-assembler-times "(strd|vstr\\.64)" 18 } } */ |