diff options
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 11 |
2 files changed, 14 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e0510a9..7547050 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2004-05-04 Chris Demetriou <cgd@broadcom.com> + + * config/mips/mips.c (override_options): Default to no + generation of branch-likely operations when tuning for + CPUs where they tend to have a negative performance impact + (e.g., SB-1). + 2004-05-04 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> * expr.c (store_constructor_field): Don't call store_constructor diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index ccb2b3f..d26626c 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -4681,9 +4681,10 @@ override_options (void) architecture. By default, we enable use of Branch Likely instructions on - all architectures which support them except for MIPS32 and MIPS64 - (i.e., the generic MIPS32 and MIPS64 ISAs, and processors which - implement them). + all architectures which support them with the following + exceptions: when creating MIPS32 or MIPS64 code, and when + tuning for architectures where their use tends to hurt + performance. The MIPS32 and MIPS64 architecture specifications say "Software is strongly encouraged to avoid use of Branch Likely @@ -4691,7 +4692,9 @@ override_options (void) of the [MIPS32 and MIPS64] architecture." Therefore, we do not issue those instructions unless instructed to do so by -mbranch-likely. */ - if (ISA_HAS_BRANCHLIKELY && !(ISA_MIPS32 || ISA_MIPS32R2 || ISA_MIPS64)) + if (ISA_HAS_BRANCHLIKELY + && !(ISA_MIPS32 || ISA_MIPS32R2 || ISA_MIPS64) + && !(TUNE_SB1)) target_flags |= MASK_BRANCHLIKELY; else target_flags &= ~MASK_BRANCHLIKELY; |