diff options
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arc/arc.c | 4 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arc/milli-1.c | 23 |
4 files changed, 33 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a585e25..f97c401 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2018-12-14 Claudiu Zissulescu <claziss@synopsys.com> + * config/arc/arc.c (arc_restore_callee_milli) Don't clobber off + variable. + +2018-12-14 Claudiu Zissulescu <claziss@synopsys.com> + * config/arc/arc.h (reg_class): Add SIBCALL_REGS. 2018-12-14 Richard Biener <rguenther@suse.de> diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 55175215..5af3ee6 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -3597,9 +3597,7 @@ arc_restore_callee_milli (unsigned int gmask, insn = frame_insn (insn); /* Add DWARF info. */ - for (regno = start_reg, off = 0; - regno <= end_reg; - regno++, off += UNITS_PER_WORD) + for (regno = start_reg; regno <= end_reg; regno++) { reg = gen_rtx_REG (SImode, regno); add_reg_note (insn, REG_CFA_RESTORE, reg); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8128ea9..3cfdfae 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2018-12-14 Claudiu Zissulescu <claziss@synopsys.com> + + * gcc.target/arc/milli-1.c: New test. + 2018-12-13 Michael Ploujnikov <michael.ploujnikov@oracle.com> * gcc.dg/lto/pr88297_0.c: New test. diff --git a/gcc/testsuite/gcc.target/arc/milli-1.c b/gcc/testsuite/gcc.target/arc/milli-1.c new file mode 100644 index 0000000..b501b39 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/milli-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-Os" } */ + +/* Test if we restore correctly blink when using millicode. */ +extern void bar (void); + +void foo (void) +{ + __asm__ volatile ( "" : : : "r13","r14","r15","r16","r17","r18","r20","r21"); + bar(); +} + +void foo2 (void) +{ + bar(); + __asm__ volatile ( "" : : : "r13","r14","r15","r16","r17","r18","r20","r21"); +} + +/* { dg-final { scan-assembler-not "st.*r13,\\\[sp" } } */ +/* { dg-final { scan-assembler-not "st.*r14,\\\[sp" } } */ +/* { dg-final { scan-assembler-not "st.*r15,\\\[sp" } } */ +/* { dg-final { scan-assembler "ld.*blink,\\\[sp,32" } } */ +/* { dg-final { scan-assembler "mov_s.*r12,32" } } */ |