diff options
| -rw-r--r-- | gcc/ChangeLog | 17 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 8 | ||||
| -rw-r--r-- | gcc/config/i386/i386.h | 2 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 36 | ||||
| -rw-r--r-- | gcc/config/i386/mmx.md | 8 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 53 | 
6 files changed, 53 insertions, 71 deletions
| diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d397e4f..ea5a9c9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,22 @@  2005-12-05  Jan Beulich  <jbeulich@novell.com> +	* config/i386/i386.c (enum ix86_builtins): Remove IX86_BUILTIN_CMPNEPS +	and IX86_BUILTIN_CMPNESS. +	(ix86_init_mmx_sse_builtins): Remove ti_ftype_ti_ti. +	* config/i386/i386.h (ALIGN_MODE_128): Don't check TFmode explicitly. +	* config/i386/i386.md (movti_internal): Correct type attribute. +	Simplify mode attribute. +	(movti_rex64, movsf_1, movdf_nointeger, movdf_integer, movtf_internal): +	Correct type attribute. +	(absxf2): Correct operator. +	* config/i386/mmx.md (mov<mode>_internal_rex64, mov<mode>_internal, +	movv2sf_internal_rex64, movv2sf_internal): Correct type attribute. +	* config/i386/sse.md (mov<mode>_internal, movv2df_internal): Simplify +	mode attribute. +	(sse2_vmsqrtv2df2): Correct mode attribute. + +2005-12-05  Jan Beulich  <jbeulich@novell.com> +  	* config/ia64/ia64.md (rotlsi3_internal): Don't split if rotating by  	16 bits. Provide insn pattern for this case. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 5a394ed..c7f9e21 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -13469,7 +13469,6 @@ enum ix86_builtins    IX86_BUILTIN_CMPNGEPS,    IX86_BUILTIN_CMPORDPS,    IX86_BUILTIN_CMPUNORDPS, -  IX86_BUILTIN_CMPNEPS,    IX86_BUILTIN_CMPEQSS,    IX86_BUILTIN_CMPLTSS,    IX86_BUILTIN_CMPLESS, @@ -13480,7 +13479,6 @@ enum ix86_builtins    IX86_BUILTIN_CMPNGESS,    IX86_BUILTIN_CMPORDSS,    IX86_BUILTIN_CMPUNORDSS, -  IX86_BUILTIN_CMPNESS,    IX86_BUILTIN_COMIEQSS,    IX86_BUILTIN_COMILTSS, @@ -14423,9 +14421,6 @@ ix86_init_mmx_sse_builtins (void)      = build_function_type_list (integer_type_node,  				V2DF_type_node, V2DF_type_node, NULL_TREE); -  tree ti_ftype_ti_ti -    = build_function_type_list (intTI_type_node, -				intTI_type_node, intTI_type_node, NULL_TREE);    tree void_ftype_pcvoid      = build_function_type_list (void_type_node, const_ptr_type_node, NULL_TREE);    tree v4sf_ftype_v4si @@ -14592,9 +14587,6 @@ ix86_init_mmx_sse_builtins (void)  	case V2DFmode:  	  type = v2df_ftype_v2df_v2df;  	  break; -	case TImode: -	  type = ti_ftype_ti_ti; -	  break;  	case V4SFmode:  	  type = v4sf_ftype_v4sf_v4sf;  	  break; diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 8202efb..e0dbd6b 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -576,7 +576,7 @@ extern int x86_prefetch_sse;  /* Decide whether a variable of mode MODE should be 128 bit aligned.  */  #define ALIGN_MODE_128(MODE) \ - ((MODE) == XFmode || (MODE) == TFmode || SSE_REG_MODE_P (MODE)) + ((MODE) == XFmode || SSE_REG_MODE_P (MODE))  /* The published ABIs say that doubles should be aligned on word     boundaries, so lower the alignment for structure fields unless diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index afcecde..d0bfc8a 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2148,24 +2148,16 @@        gcc_unreachable ();      }  } -  [(set_attr "type" "ssemov,ssemov,ssemov") +  [(set_attr "type" "sselog1,ssemov,ssemov")     (set (attr "mode") -        (cond [(eq (symbol_ref "TARGET_SSE2") (const_int 0)) +	(cond [(ior (eq (symbol_ref "TARGET_SSE2") (const_int 0)) +		    (ne (symbol_ref "optimize_size") (const_int 0)))  		 (const_string "V4SF") - -	       (eq_attr "alternative" "0,1") -		 (if_then_else -		   (ne (symbol_ref "optimize_size") -		       (const_int 0)) -		   (const_string "V4SF") -		   (const_string "TI")) -	       (eq_attr "alternative" "2") -		 (if_then_else -		   (ne (symbol_ref "optimize_size") -		       (const_int 0)) -		   (const_string "V4SF") -		   (const_string "TI"))] -	       (const_string "TI")))]) +	       (and (eq_attr "alternative" "2") +		    (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES") +			(const_int 0))) +		 (const_string "V4SF")] +	      (const_string "TI")))])  (define_insn "*movti_rex64"    [(set (match_operand:TI 0 "nonimmediate_operand" "=r,o,x,x,xm") @@ -2193,7 +2185,7 @@        gcc_unreachable ();      }  } -  [(set_attr "type" "*,*,ssemov,ssemov,ssemov") +  [(set_attr "type" "*,*,sselog1,ssemov,ssemov")     (set (attr "mode")          (cond [(eq_attr "alternative" "2,3")  		 (if_then_else @@ -2330,7 +2322,7 @@        gcc_unreachable ();      }  } -  [(set_attr "type" "fmov,fmov,fmov,imov,imov,ssemov,ssemov,ssemov,ssemov,mmxmov,mmxmov,mmxmov") +  [(set_attr "type" "fmov,fmov,fmov,imov,imov,sselog1,ssemov,ssemov,ssemov,mmxmov,mmxmov,mmxmov")     (set (attr "mode")          (cond [(eq_attr "alternative" "3,4,9,10")  		 (const_string "SI") @@ -2512,7 +2504,7 @@        gcc_unreachable ();      }  } -  [(set_attr "type" "fmov,fmov,fmov,multi,multi,ssemov,ssemov,ssemov,ssemov") +  [(set_attr "type" "fmov,fmov,fmov,multi,multi,sselog1,ssemov,ssemov,ssemov")     (set (attr "mode")          (cond [(eq_attr "alternative" "0,1,2")  		 (const_string "DF") @@ -2633,7 +2625,7 @@        gcc_unreachable();      }  } -  [(set_attr "type" "fmov,fmov,fmov,multi,multi,ssemov,ssemov,ssemov,ssemov") +  [(set_attr "type" "fmov,fmov,fmov,multi,multi,sselog1,ssemov,ssemov,ssemov")     (set (attr "mode")          (cond [(eq_attr "alternative" "0,1,2")  		 (const_string "DF") @@ -2944,7 +2936,7 @@        gcc_unreachable ();      }  } -  [(set_attr "type" "*,*,ssemov,ssemov,ssemov") +  [(set_attr "type" "*,*,sselog1,ssemov,ssemov")     (set (attr "mode")          (cond [(eq_attr "alternative" "2,3")  		 (if_then_else @@ -9703,7 +9695,7 @@  (define_expand "absxf2"    [(set (match_operand:XF 0 "nonimmediate_operand" "") -	(neg:XF (match_operand:XF 1 "nonimmediate_operand" "")))] +	(abs:XF (match_operand:XF 1 "nonimmediate_operand" "")))]    "TARGET_80387"    "ix86_expand_fp_absneg_operator (ABS, XFmode, operands); DONE;") diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 2f0065d..e9bfb65 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -82,7 +82,7 @@      movq\t{%1, %0|%0, %1}      movd\t{%1, %0|%0, %1}      movd\t{%1, %0|%0, %1}" -  [(set_attr "type" "imov,imov,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,ssemov,ssemov,ssemov,ssemov") +  [(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,ssemov")     (set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*")     (set_attr "mode" "DI")]) @@ -108,7 +108,7 @@      movlps\t{%1, %0|%0, %1}      #      #" -  [(set_attr "type" "mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,ssemov,ssemov,ssemov,ssemov,ssemov,ssemov,*,*") +  [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov,*,*")     (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*,*,*,*")     (set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")]) @@ -142,7 +142,7 @@      movlps\t{%1, %0|%0, %1}      movd\t{%1, %0|%0, %1}      movd\t{%1, %0|%0, %1}" -  [(set_attr "type" "imov,imov,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,ssemov,ssemov,ssemov,ssemov,ssemov") +  [(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,sselog1,ssemov,ssemov,ssemov,ssemov")     (set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*,*")     (set_attr "mode" "DI,DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")]) @@ -165,7 +165,7 @@      movlps\t{%1, %0|%0, %1}      #      #" -  [(set_attr "type" "mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,ssemov,ssemov,ssemov,*,*") +  [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,*,*")     (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*")     (set_attr "mode" "DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")]) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 6535d68..8fc3da0 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -81,24 +81,14 @@  }    [(set_attr "type" "sselog1,ssemov,ssemov")     (set (attr "mode") -	(cond [(eq (symbol_ref "TARGET_SSE2") (const_int 0)) -		 (const_string "V4SF") - -	       (eq_attr "alternative" "0,1") -		 (if_then_else -		   (ne (symbol_ref "optimize_size") -		       (const_int 0)) -		   (const_string "V4SF") -		   (const_string "TI")) -	       (eq_attr "alternative" "2") -		 (if_then_else -		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES") -			    (const_int 0)) -			(ne (symbol_ref "optimize_size") -			    (const_int 0))) -		   (const_string "V4SF") -		   (const_string "TI"))] -	       (const_string "TI")))]) +	(if_then_else +	  (ior (ior (ne (symbol_ref "optimize_size") (const_int 0)) +		    (eq (symbol_ref "TARGET_SSE2") (const_int 0))) +	       (and (eq_attr "alternative" "2") +	  	    (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES") +		        (const_int 0)))) +	  (const_string "V4SF") +	  (const_string "TI")))])  (define_expand "movv4sf"    [(set (match_operand:V4SF 0 "nonimmediate_operand" "") @@ -167,23 +157,14 @@  }    [(set_attr "type" "sselog1,ssemov,ssemov")     (set (attr "mode") -	(cond [(eq (symbol_ref "TARGET_SSE2") (const_int 0)) -		 (const_string "V4SF") -	       (eq_attr "alternative" "0,1") -		 (if_then_else -		   (ne (symbol_ref "optimize_size") -		       (const_int 0)) -		   (const_string "V4SF") -		   (const_string "V2DF")) -	       (eq_attr "alternative" "2") -		 (if_then_else -		   (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES") -			    (const_int 0)) -			(ne (symbol_ref "optimize_size") -			    (const_int 0))) -		   (const_string "V4SF") -		   (const_string "V2DF"))] -	       (const_string "V2DF")))]) +	(if_then_else +	  (ior (ior (ne (symbol_ref "optimize_size") (const_int 0)) +		    (eq (symbol_ref "TARGET_SSE2") (const_int 0))) +	       (and (eq_attr "alternative" "2") +	  	    (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES") +		        (const_int 0)))) +	  (const_string "V4SF") +	  (const_string "V2DF")))])  (define_split    [(set (match_operand:V2DF 0 "register_operand" "") @@ -1525,7 +1506,7 @@    "TARGET_SSE2"    "sqrtsd\t{%1, %0|%0, %1}"    [(set_attr "type" "sse") -   (set_attr "mode" "SF")]) +   (set_attr "mode" "DF")])  ;; ??? For !flag_finite_math_only, the representation with SMIN/SMAX  ;; isn't really correct, as those rtl operators aren't defined when  | 
