diff options
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 15 |
2 files changed, 14 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index eadd1e8..068a854 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2003-03-13 Aldy Hernandez <aldyh@redhat.com> + + * config/rs6000/rs6000.c (rs6000_dwarf_register_span): + Differentiate endianness. + (s6000_override_options): Use cpu type instead of TARGET_SPE. + 2003-03-13 Nick Clifton <nickc@redhat.com> * config/arm/arm.c (print_multi_reg): Do not generate a type 2 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index d8ceb4a..b95e27b 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -695,7 +695,7 @@ rs6000_override_options (default_cpu) /* The e500 does not have string instructions, and we set MASK_STRING above when optimizing for size. */ - if (TARGET_SPE && (target_flags & MASK_STRING) != 0) + if (rs6000_cpu == PROCESSOR_PPC8540 && (target_flags & MASK_STRING) != 0) target_flags = target_flags & ~MASK_STRING; /* Handle -m(no-)longcall option. This is a bit of a cheap hack, @@ -13759,12 +13759,13 @@ rs6000_dwarf_register_span (reg) 64-bits. */ return gen_rtx_PARALLEL (VOIDmode, - gen_rtvec (2, - gen_rtx_REG (SImode, regno), - /* Who, where, what? 1200? This - will get changed to a sane value - when the SPE ABI finalizes. */ - gen_rtx_REG (SImode, regno + 1200))); + BYTES_BIG_ENDIAN + ? gen_rtvec (2, + gen_rtx_REG (SImode, regno + 1200), + gen_rtx_REG (SImode, regno)) + : gen_rtvec (2, + gen_rtx_REG (SImode, regno), + gen_rtx_REG (SImode, regno + 1200))); } #include "gt-rs6000.h" |