diff options
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/expr.c | 3 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/pr68286.c | 17 |
4 files changed, 29 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index db14b22..0a2a9ae 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-11-12 Ilya Enkovich <enkovich.gnu@gmail.com> + + * expr.c (do_store_flag): Expand vector comparison as + VEC_COND_EXPR if vector comparison is not supported + by target. + 2015-11-12 Renlin Li <renlin.li@arm.com> * config/arm/arm.md (addsi3_compare_op2): Make the order of @@ -11128,7 +11128,8 @@ do_store_flag (sepops ops, rtx target, machine_mode mode) if (TREE_CODE (ops->type) == VECTOR_TYPE) { tree ifexp = build2 (ops->code, ops->type, arg0, arg1); - if (VECTOR_BOOLEAN_TYPE_P (ops->type)) + if (VECTOR_BOOLEAN_TYPE_P (ops->type) + && expand_vec_cmp_expr_p (TREE_TYPE (arg0), ops->type)) return expand_vec_cmp_expr (ops->type, ifexp, target); else { diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1fd6ccf..20a7deb 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2015-11-12 Ilya Enkovich <enkovich.gnu@gmail.com> + + * gcc.dg/pr68286.c: New test. + 2015-11-12 Christian Bruel <christian.bruel@st.com> * gcc.target/arm/mmx-1.c: Adjust for unified asm. diff --git a/gcc/testsuite/gcc.dg/pr68286.c b/gcc/testsuite/gcc.dg/pr68286.c new file mode 100644 index 0000000..d0392e8 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr68286.c @@ -0,0 +1,17 @@ +/* PR target/68286 */ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ + +int a, b, c; +int fn1 () +{ + int d[] = {0}; + for (; c; c++) + { + float e = c; + if (e) + d[0]++; + } + b = d[0]; + return a; +} |