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-rw-r--r--gcc/ChangeLog30
-rw-r--r--gcc/cfgexpand.c2
-rw-r--r--gcc/combine.c2
-rw-r--r--gcc/config/arc/arc.c2
-rw-r--r--gcc/config/arm/arm.c4
-rw-r--r--gcc/config/i386/i386.c6
-rw-r--r--gcc/config/s390/s390.c2
-rw-r--r--gcc/config/sparc/sparc.c4
-rw-r--r--gcc/config/spu/spu.c5
-rw-r--r--gcc/coverage.c6
-rw-r--r--gcc/dse.c9
-rw-r--r--gcc/expmed.c2
-rw-r--r--gcc/expr.c14
-rw-r--r--gcc/internal-fn.c4
-rw-r--r--gcc/machmode.h11
-rw-r--r--gcc/optabs-query.c8
-rw-r--r--gcc/optabs.c3
-rw-r--r--gcc/stor-layout.c29
-rw-r--r--gcc/targhooks.c4
-rw-r--r--gcc/tree-ssa-loop-manip.c3
20 files changed, 95 insertions, 55 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0659997..15ec88d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,34 @@
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
+ Alan Hayward <alan.hayward@arm.com>
+ David Sherwood <david.sherwood@arm.com>
+
+ * machmode.h (smallest_mode_for_size): Fix formatting.
+ (smallest_int_mode_for_size): New function.
+ * cfgexpand.c (expand_debug_expr): Use smallest_int_mode_for_size
+ instead of smallest_mode_for_size.
+ * combine.c (make_extraction): Likewise.
+ * config/arc/arc.c (arc_expand_movmem): Likewise.
+ * config/arm/arm.c (arm_expand_divmod_libfunc): Likewise.
+ * config/i386/i386.c (ix86_get_mask_mode): Likewise.
+ * config/s390/s390.c (s390_expand_insv): Likewise.
+ * config/sparc/sparc.c (assign_int_registers): Likewise.
+ * config/spu/spu.c (spu_function_value): Likewise.
+ (spu_function_arg): Likewise.
+ * coverage.c (get_gcov_type): Likewise.
+ (get_gcov_unsigned_t): Likewise.
+ * dse.c (find_shift_sequence): Likewise.
+ * expmed.c (store_bit_field_1): Likewise.
+ * expr.c (convert_move): Likewise.
+ (store_field): Likewise.
+ * internal-fn.c (expand_arith_overflow): Likewise.
+ * optabs-query.c (get_best_extraction_insn): Likewise.
+ * optabs.c (expand_twoval_binop_libfunc): Likewise.
+ * stor-layout.c (layout_type): Likewise.
+ (initialize_sizetypes): Likewise.
+ * targhooks.c (default_get_mask_mode): Likewise.
+ * tree-ssa-loop-manip.c (canonicalize_loop_ivs): Likewise.
+
+2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index f6e306e..7a90b0e 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -4497,7 +4497,7 @@ expand_debug_expr (tree exp)
{
if (mode1 == VOIDmode)
/* Bitfield. */
- mode1 = smallest_mode_for_size (bitsize, MODE_INT);
+ mode1 = smallest_int_mode_for_size (bitsize);
if (bitpos >= BITS_PER_UNIT)
{
op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
diff --git a/gcc/combine.c b/gcc/combine.c
index f792a93..44e378a 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -7598,7 +7598,7 @@ make_extraction (machine_mode mode, rtx inner, HOST_WIDE_INT pos,
{
/* Be careful not to go beyond the extracted object and maintain the
natural alignment of the memory. */
- wanted_inner_mode = smallest_mode_for_size (len, MODE_INT);
+ wanted_inner_mode = smallest_int_mode_for_size (len);
while (pos % GET_MODE_BITSIZE (wanted_inner_mode) + len
> GET_MODE_BITSIZE (wanted_inner_mode))
wanted_inner_mode = GET_MODE_WIDER_MODE (wanted_inner_mode).require ();
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index c072bda..1f5c6df 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -7972,7 +7972,7 @@ arc_expand_movmem (rtx *operands)
while (piece > size)
piece >>= 1;
- mode = smallest_mode_for_size (piece * BITS_PER_UNIT, MODE_INT);
+ mode = smallest_int_mode_for_size (piece * BITS_PER_UNIT);
/* If we don't re-use temporaries, the scheduler gets carried away,
and the register pressure gets unnecessarily high. */
if (0 && tmpx[i] && GET_MODE (tmpx[i]) == mode)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 982ea7e..e66cfa6 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -31097,8 +31097,8 @@ arm_expand_divmod_libfunc (rtx libfunc, machine_mode mode,
if (mode == SImode)
gcc_assert (!TARGET_IDIV);
- machine_mode libval_mode = smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode),
- MODE_INT);
+ scalar_int_mode libval_mode
+ = smallest_int_mode_for_size (2 * GET_MODE_BITSIZE (mode));
rtx libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
libval_mode, 2,
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index c574c95..be83381 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -51580,11 +51580,11 @@ ix86_get_mask_mode (unsigned nunits, unsigned vector_size)
|| (TARGET_AVX512VL && (vector_size == 32 || vector_size == 16)))
{
if (elem_size == 4 || elem_size == 8 || TARGET_AVX512BW)
- return smallest_mode_for_size (nunits, MODE_INT);
+ return smallest_int_mode_for_size (nunits);
}
- machine_mode elem_mode
- = smallest_mode_for_size (elem_size * BITS_PER_UNIT, MODE_INT);
+ scalar_int_mode elem_mode
+ = smallest_int_mode_for_size (elem_size * BITS_PER_UNIT);
gcc_assert (elem_size * nunits == vector_size);
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index b5c0bd1..e4d14fb 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -6185,7 +6185,7 @@ s390_expand_insv (rtx dest, rtx op1, rtx op2, rtx src)
return true;
}
- smode = smallest_mode_for_size (bitsize, MODE_INT);
+ smode = smallest_int_mode_for_size (bitsize);
smode_bsize = GET_MODE_BITSIZE (smode);
mode_bsize = GET_MODE_BITSIZE (mode);
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index c6efe19..a3e7e46 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -6771,8 +6771,8 @@ assign_int_registers (HOST_WIDE_INT bitpos, assign_data_t *data)
the latter case we may pick up unwanted bits. It's not a problem
at the moment but may wish to revisit. */
if (intoffset % BITS_PER_WORD != 0)
- mode = smallest_mode_for_size (BITS_PER_WORD - intoffset % BITS_PER_WORD,
- MODE_INT);
+ mode = smallest_int_mode_for_size (BITS_PER_WORD
+ - intoffset % BITS_PER_WORD);
else
mode = word_mode;
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index dfa777e..b917609 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -3810,8 +3810,7 @@ spu_function_value (const_tree type, const_tree func ATTRIBUTE_UNUSED)
{
if (byte_size < 4)
byte_size = 4;
- smode =
- smallest_mode_for_size (byte_size * BITS_PER_UNIT, MODE_INT);
+ smode = smallest_int_mode_for_size (byte_size * BITS_PER_UNIT);
RTVEC_ELT (v, n) =
gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_REG (smode, FIRST_RETURN_REGNUM + n),
@@ -3849,7 +3848,7 @@ spu_function_arg (cumulative_args_t cum_v,
rtx gr_reg;
if (byte_size < 4)
byte_size = 4;
- smode = smallest_mode_for_size (byte_size * BITS_PER_UNIT, MODE_INT);
+ smode = smallest_int_mode_for_size (byte_size * BITS_PER_UNIT);
gr_reg = gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_REG (smode, FIRST_ARG_REGNUM + *cum),
const0_rtx);
diff --git a/gcc/coverage.c b/gcc/coverage.c
index ed46910..8a56a67 100644
--- a/gcc/coverage.c
+++ b/gcc/coverage.c
@@ -143,8 +143,8 @@ static void coverage_obj_finish (vec<constructor_elt, va_gc> *);
tree
get_gcov_type (void)
{
- machine_mode mode
- = smallest_mode_for_size (LONG_LONG_TYPE_SIZE > 32 ? 64 : 32, MODE_INT);
+ scalar_int_mode mode
+ = smallest_int_mode_for_size (LONG_LONG_TYPE_SIZE > 32 ? 64 : 32);
return lang_hooks.types.type_for_mode (mode, false);
}
@@ -153,7 +153,7 @@ get_gcov_type (void)
static tree
get_gcov_unsigned_t (void)
{
- machine_mode mode = smallest_mode_for_size (32, MODE_INT);
+ scalar_int_mode mode = smallest_int_mode_for_size (32);
return lang_hooks.types.type_for_mode (mode, true);
}
diff --git a/gcc/dse.c b/gcc/dse.c
index aa1c766..e664332 100644
--- a/gcc/dse.c
+++ b/gcc/dse.c
@@ -1573,7 +1573,7 @@ find_shift_sequence (int access_size,
int shift, bool speed, bool require_cst)
{
machine_mode store_mode = GET_MODE (store_info->mem);
- machine_mode new_mode;
+ scalar_int_mode new_mode;
rtx read_reg = NULL;
/* Some machines like the x86 have shift insns for each size of
@@ -1583,14 +1583,15 @@ find_shift_sequence (int access_size,
justify the value we want to read but is available in one insn on
the machine. */
- FOR_EACH_MODE_FROM (new_mode,
- smallest_mode_for_size (access_size * BITS_PER_UNIT,
- MODE_INT))
+ opt_scalar_int_mode new_mode_iter;
+ FOR_EACH_MODE_FROM (new_mode_iter,
+ smallest_int_mode_for_size (access_size * BITS_PER_UNIT))
{
rtx target, new_reg, new_lhs;
rtx_insn *shift_seq, *insn;
int cost;
+ new_mode = new_mode_iter.require ();
if (GET_MODE_BITSIZE (new_mode) > BITS_PER_WORD)
break;
diff --git a/gcc/expmed.c b/gcc/expmed.c
index b24b6d1..f7ac821 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -900,7 +900,7 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
is not allowed. */
fieldmode = GET_MODE (value);
if (fieldmode == VOIDmode)
- fieldmode = smallest_mode_for_size (nwords * BITS_PER_WORD, MODE_INT);
+ fieldmode = smallest_int_mode_for_size (nwords * BITS_PER_WORD);
last = get_last_insn ();
for (i = 0; i < nwords; i++)
diff --git a/gcc/expr.c b/gcc/expr.c
index b9a0b06..776c719 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -346,8 +346,8 @@ convert_move (rtx to, rtx from, int unsignedp)
xImode for all MODE_PARTIAL_INT modes they use, but no others. */
if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
{
- machine_mode full_mode
- = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
+ scalar_int_mode full_mode
+ = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode));
gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
!= CODE_FOR_nothing);
@@ -361,8 +361,8 @@ convert_move (rtx to, rtx from, int unsignedp)
if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
{
rtx new_from;
- machine_mode full_mode
- = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
+ scalar_int_mode full_mode
+ = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode));
convert_optab ctab = unsignedp ? zext_optab : sext_optab;
enum insn_code icode;
@@ -6848,8 +6848,8 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
if (GET_CODE (temp) == PARALLEL)
{
HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
- machine_mode temp_mode
- = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
+ scalar_int_mode temp_mode
+ = smallest_int_mode_for_size (size * BITS_PER_UNIT);
rtx temp_target = gen_reg_rtx (temp_mode);
emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
temp = temp_target;
@@ -6920,7 +6920,7 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
word size, we need to load the value (see again store_bit_field). */
if (GET_MODE (temp) == BLKmode && bitsize <= BITS_PER_WORD)
{
- machine_mode temp_mode = smallest_mode_for_size (bitsize, MODE_INT);
+ scalar_int_mode temp_mode = smallest_int_mode_for_size (bitsize);
temp = extract_bit_field (temp, bitsize, 0, 1, NULL_RTX, temp_mode,
temp_mode, false, NULL);
}
diff --git a/gcc/internal-fn.c b/gcc/internal-fn.c
index 017a469..2c243fd 100644
--- a/gcc/internal-fn.c
+++ b/gcc/internal-fn.c
@@ -2173,7 +2173,7 @@ expand_arith_overflow (enum tree_code code, gimple *stmt)
if (orig_precres == precres && precop <= BITS_PER_WORD)
{
int p = MAX (min_precision, precop);
- machine_mode m = smallest_mode_for_size (p, MODE_INT);
+ scalar_int_mode m = smallest_int_mode_for_size (p);
tree optype = build_nonstandard_integer_type (GET_MODE_PRECISION (m),
uns0_p && uns1_p
&& unsr_p);
@@ -2215,7 +2215,7 @@ expand_arith_overflow (enum tree_code code, gimple *stmt)
if (orig_precres == precres)
{
int p = MAX (prec0, prec1);
- machine_mode m = smallest_mode_for_size (p, MODE_INT);
+ scalar_int_mode m = smallest_int_mode_for_size (p);
tree optype = build_nonstandard_integer_type (GET_MODE_PRECISION (m),
uns0_p && uns1_p
&& unsr_p);
diff --git a/gcc/machmode.h b/gcc/machmode.h
index 590f100..6fd10b4 100644
--- a/gcc/machmode.h
+++ b/gcc/machmode.h
@@ -588,9 +588,16 @@ float_mode_for_size (unsigned int size)
/* Similar to mode_for_size, but find the smallest mode for a given width. */
-extern machine_mode smallest_mode_for_size (unsigned int,
- enum mode_class);
+extern machine_mode smallest_mode_for_size (unsigned int, enum mode_class);
+/* Find the narrowest integer mode that contains at least SIZE bits.
+ Such a mode must exist. */
+
+inline scalar_int_mode
+smallest_int_mode_for_size (unsigned int size)
+{
+ return as_a <scalar_int_mode> (smallest_mode_for_size (size, MODE_INT));
+}
/* Return an integer mode of exactly the same size as the input mode. */
diff --git a/gcc/optabs-query.c b/gcc/optabs-query.c
index 021d816..48b1250 100644
--- a/gcc/optabs-query.c
+++ b/gcc/optabs-query.c
@@ -193,13 +193,15 @@ get_best_extraction_insn (extraction_insn *insn,
unsigned HOST_WIDE_INT struct_bits,
machine_mode field_mode)
{
- machine_mode mode = smallest_mode_for_size (struct_bits, MODE_INT);
- FOR_EACH_MODE_FROM (mode, mode)
+ opt_scalar_int_mode mode_iter;
+ FOR_EACH_MODE_FROM (mode_iter, smallest_int_mode_for_size (struct_bits))
{
+ scalar_int_mode mode = mode_iter.require ();
if (get_extraction_insn (insn, pattern, type, mode))
{
- FOR_EACH_MODE_FROM (mode, mode)
+ FOR_EACH_MODE_FROM (mode_iter, mode)
{
+ mode = mode_iter.require ();
if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (field_mode)
|| TRULY_NOOP_TRUNCATION_MODES_P (insn->field_mode,
field_mode))
diff --git a/gcc/optabs.c b/gcc/optabs.c
index 1d854b6..ee3b4e9 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -2084,8 +2084,7 @@ expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
/* The value returned by the library function will have twice as
many bits as the nominal MODE. */
- libval_mode = smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode),
- MODE_INT);
+ libval_mode = smallest_int_mode_for_size (2 * GET_MODE_BITSIZE (mode));
start_sequence ();
libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
libval_mode, 2,
diff --git a/gcc/stor-layout.c b/gcc/stor-layout.c
index f1a601b..76d0075 100644
--- a/gcc/stor-layout.c
+++ b/gcc/stor-layout.c
@@ -2194,12 +2194,15 @@ layout_type (tree type)
case BOOLEAN_TYPE:
case INTEGER_TYPE:
case ENUMERAL_TYPE:
- SET_TYPE_MODE (type,
- smallest_mode_for_size (TYPE_PRECISION (type), MODE_INT));
- TYPE_SIZE (type) = bitsize_int (GET_MODE_BITSIZE (TYPE_MODE (type)));
- /* Don't set TYPE_PRECISION here, as it may be set by a bitfield. */
- TYPE_SIZE_UNIT (type) = size_int (GET_MODE_SIZE (TYPE_MODE (type)));
- break;
+ {
+ scalar_int_mode mode
+ = smallest_int_mode_for_size (TYPE_PRECISION (type));
+ SET_TYPE_MODE (type, mode);
+ TYPE_SIZE (type) = bitsize_int (GET_MODE_BITSIZE (mode));
+ /* Don't set TYPE_PRECISION here, as it may be set by a bitfield. */
+ TYPE_SIZE_UNIT (type) = size_int (GET_MODE_SIZE (mode));
+ break;
+ }
case REAL_TYPE:
{
@@ -2608,8 +2611,7 @@ initialize_sizetypes (void)
bprecision
= MIN (precision + LOG2_BITS_PER_UNIT + 1, MAX_FIXED_MODE_SIZE);
- bprecision
- = GET_MODE_PRECISION (smallest_mode_for_size (bprecision, MODE_INT));
+ bprecision = GET_MODE_PRECISION (smallest_int_mode_for_size (bprecision));
if (bprecision > HOST_BITS_PER_DOUBLE_INT)
bprecision = HOST_BITS_PER_DOUBLE_INT;
@@ -2624,17 +2626,18 @@ initialize_sizetypes (void)
TYPE_UNSIGNED (bitsizetype) = 1;
/* Now layout both types manually. */
- SET_TYPE_MODE (sizetype, smallest_mode_for_size (precision, MODE_INT));
+ scalar_int_mode mode = smallest_int_mode_for_size (precision);
+ SET_TYPE_MODE (sizetype, mode);
SET_TYPE_ALIGN (sizetype, GET_MODE_ALIGNMENT (TYPE_MODE (sizetype)));
TYPE_SIZE (sizetype) = bitsize_int (precision);
- TYPE_SIZE_UNIT (sizetype) = size_int (GET_MODE_SIZE (TYPE_MODE (sizetype)));
+ TYPE_SIZE_UNIT (sizetype) = size_int (GET_MODE_SIZE (mode));
set_min_and_max_values_for_integral_type (sizetype, precision, UNSIGNED);
- SET_TYPE_MODE (bitsizetype, smallest_mode_for_size (bprecision, MODE_INT));
+ mode = smallest_int_mode_for_size (bprecision);
+ SET_TYPE_MODE (bitsizetype, mode);
SET_TYPE_ALIGN (bitsizetype, GET_MODE_ALIGNMENT (TYPE_MODE (bitsizetype)));
TYPE_SIZE (bitsizetype) = bitsize_int (bprecision);
- TYPE_SIZE_UNIT (bitsizetype)
- = size_int (GET_MODE_SIZE (TYPE_MODE (bitsizetype)));
+ TYPE_SIZE_UNIT (bitsizetype) = size_int (GET_MODE_SIZE (mode));
set_min_and_max_values_for_integral_type (bitsizetype, bprecision, UNSIGNED);
/* Create the signed variants of *sizetype. */
diff --git a/gcc/targhooks.c b/gcc/targhooks.c
index 2b7f27f..72e199f 100644
--- a/gcc/targhooks.c
+++ b/gcc/targhooks.c
@@ -1180,8 +1180,8 @@ machine_mode
default_get_mask_mode (unsigned nunits, unsigned vector_size)
{
unsigned elem_size = vector_size / nunits;
- machine_mode elem_mode
- = smallest_mode_for_size (elem_size * BITS_PER_UNIT, MODE_INT);
+ scalar_int_mode elem_mode
+ = smallest_int_mode_for_size (elem_size * BITS_PER_UNIT);
machine_mode vector_mode;
gcc_assert (elem_size * nunits == vector_size);
diff --git a/gcc/tree-ssa-loop-manip.c b/gcc/tree-ssa-loop-manip.c
index 5488044..d6ba305 100644
--- a/gcc/tree-ssa-loop-manip.c
+++ b/gcc/tree-ssa-loop-manip.c
@@ -1506,7 +1506,6 @@ canonicalize_loop_ivs (struct loop *loop, tree *nit, bool bump_in_latch)
gcond *stmt;
edge exit = single_dom_exit (loop);
gimple_seq stmts;
- machine_mode mode;
bool unsigned_p = false;
for (psi = gsi_start_phis (loop->header);
@@ -1533,7 +1532,7 @@ canonicalize_loop_ivs (struct loop *loop, tree *nit, bool bump_in_latch)
precision = TYPE_PRECISION (type);
}
- mode = smallest_mode_for_size (precision, MODE_INT);
+ scalar_int_mode mode = smallest_int_mode_for_size (precision);
precision = GET_MODE_PRECISION (mode);
type = build_nonstandard_integer_type (precision, unsigned_p);
generated by cgit v1.1 at 2025-05-20 12:12:33 +0000