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-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/doc/rtl.texi26
-rw-r--r--gcc/rtl.def6
-rw-r--r--gcc/simplify-rtx.c3
4 files changed, 38 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f41b3a9..9f19a12 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2006-04-24 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ * rtl.def (SS_ASHIFT, SS_NEG): New codes.
+ * doc/rtl.texi: Document them.
+ * simplify-rtx.c (simplify_unary_operation,
+ simplify_binary_operation_1): Don't abort when we see them.
+
2006-04-24 Mark Mitchell <mark@codesourcery.com>
Revert:
diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi
index 71e6df7..87f13d8 100644
--- a/gcc/doc/rtl.texi
+++ b/gcc/doc/rtl.texi
@@ -1889,9 +1889,18 @@ or the first operand must be loaded into a register while its mode is
still known.
@findex neg
+@findex ss_neg
+@cindex negation
+@cindex negation with signed saturation
@item (neg:@var{m} @var{x})
-Represents the negation (subtraction from zero) of the value represented
-by @var{x}, carried out in mode @var{m}.
+@itemx (ss_neg:@var{m} @var{x})
+These two expressions represent the negation (subtraction from zero) of
+the value represented by @var{x}, carried out in mode @var{m}. They
+differ in the behaviour on overflow of integer modes. In the case of
+@code{neg}, the negation of the operand may be a number not representable
+in mode @var{m}, in which case it is truncated to @var{m}. @code{ss_neg}
+ensures that an out-of-bounds result saturates to the maximum or minimum
+representable value.
@findex mult
@cindex multiplication
@@ -1998,12 +2007,21 @@ and @var{y}, carried out in machine mode @var{m}, which must be a
fixed-point mode.
@findex ashift
+@findex ss_ashift
@cindex left shift
@cindex shift
@cindex arithmetic shift
+@cindex arithmetic shift with signed saturation
@item (ashift:@var{m} @var{x} @var{c})
-Represents the result of arithmetically shifting @var{x} left by @var{c}
-places. @var{x} have mode @var{m}, a fixed-point machine mode. @var{c}
+@itemx (ss_ashift:@var{m} @var{x} @var{c})
+These two expressions epresent the result of arithmetically shifting @var{x}
+left by @var{c} places. They differ in their behavior on overflow of integer
+modes. An @code{ashift} operation is a plain shift with no special behaviour
+in case of a change in the sign bit; @code{ss_ashift} saturates to the minimum
+or maximum representable value rather than allowing the shift to change the
+sign bit of the value.
+
+@var{x} have mode @var{m}, a fixed-point machine mode. @var{c}
be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
mode is determined by the mode called for in the machine description
entry for the left-shift instruction. For example, on the VAX, the mode
diff --git a/gcc/rtl.def b/gcc/rtl.def
index 4c5a632..847b51c 100644
--- a/gcc/rtl.def
+++ b/gcc/rtl.def
@@ -642,6 +642,12 @@ DEF_RTL_EXPR(US_PLUS, "us_plus", "ee", RTX_COMM_ARITH)
/* Operand 0 minus operand 1, with signed saturation. */
DEF_RTL_EXPR(SS_MINUS, "ss_minus", "ee", RTX_BIN_ARITH)
+/* Negation with signed saturation. */
+DEF_RTL_EXPR(SS_NEG, "ss_neg", "e", RTX_UNARY)
+
+/* Shift left with signed saturation. */
+DEF_RTL_EXPR(SS_ASHIFT, "ss_ashift", "ee", RTX_BIN_ARITH)
+
/* Operand 0 minus operand 1, with unsigned saturation. */
DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", RTX_BIN_ARITH)
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 0ce033d..962c2de 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -1092,6 +1092,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
case FLOAT_TRUNCATE:
case SS_TRUNCATE:
case US_TRUNCATE:
+ case SS_NEG:
return 0;
default:
@@ -2422,6 +2423,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
/* Fall through.... */
case ASHIFT:
+ case SS_ASHIFT:
case LSHIFTRT:
if (trueop1 == CONST0_RTX (mode))
return op0;
@@ -3110,6 +3112,7 @@ simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode,
case US_PLUS:
case SS_MINUS:
case US_MINUS:
+ case SS_ASHIFT:
/* ??? There are simplifications that can be done. */
return 0;