diff options
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/mips/iris6.h | 5 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 12 |
3 files changed, 25 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d97b440..0fac52c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2005-04-05 Olivier Hainque <hainque@adacore.com> + + * config/mips/iris6.h (DWARF_FRAME_RETURN_COLUMN): Redefine to + match what the system unwinder expects. + * config/mips/mips.c (mips_frame_set): If we're saving the return + address register and the dwarf return address column number differs + from the hard register number, adjust the note reg to refer to the + former. + 2004-04-05 Richard Sandiford <rsandifo@redhat.com> * config/mn10300/mn10300-protos.h (mn10300_override_options): Declare. diff --git a/gcc/config/mips/iris6.h b/gcc/config/mips/iris6.h index ff05125..b64d371 100644 --- a/gcc/config/mips/iris6.h +++ b/gcc/config/mips/iris6.h @@ -38,6 +38,11 @@ Boston, MA 02111-1307, USA. */ compiling -g. This guarantees that we can unwind the stack. */ #define DWARF2_FRAME_INFO 1 +/* The system unwinder in libexc requires a specific dwarf return address + column to work. */ +#undef DWARF_FRAME_RETURN_COLUMN +#define DWARF_FRAME_RETURN_COLUMN (FP_REG_LAST + 1) + #undef MACHINE_TYPE #define MACHINE_TYPE "SGI running IRIX 6.x" diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 30b14c5..0a82ce1 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -6276,8 +6276,18 @@ mips_set_frame_expr (rtx frame_pattern) static rtx mips_frame_set (rtx mem, rtx reg) { - rtx set = gen_rtx_SET (VOIDmode, mem, reg); + rtx set; + + /* If we're saving the return address register and the dwarf return + address column differs from the hard register number, adjust the + note reg to refer to the former. */ + if (REGNO (reg) == GP_REG_FIRST + 31 + && DWARF_FRAME_RETURN_COLUMN != GP_REG_FIRST + 31) + reg = gen_rtx_REG (GET_MODE (reg), DWARF_FRAME_RETURN_COLUMN); + + set = gen_rtx_SET (VOIDmode, mem, reg); RTX_FRAME_RELATED_P (set) = 1; + return set; } |