diff options
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/tree-ssa-loop-prefetch.c | 2 |
2 files changed, 5 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 04afe92..64bb56f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2010-09-02 Ian Bolton <ian.bolton@arm.com> + + * tree-ssa-loop-prefetch.c: Fix comment at head of file. + 2010-09-02 Olivier Hainque <hainque@adacore.com> * ira-color.c (SORTGT): New macro, helper for qsort callbacks. @@ -176,7 +180,6 @@ (scev_probably_wraps_p): Adjust. * tree-ssa-loop.c (tree_ssa_loop_bounds): Likewise. ->>>>>>> .r163759 2010-09-01 Nick Clifton <nickc@redhat.com> * config/stormy16/stormy16.c: Use REG_P, MEM_P and CONST_INT_P diff --git a/gcc/tree-ssa-loop-prefetch.c b/gcc/tree-ssa-loop-prefetch.c index e19d876..b35f1db 100644 --- a/gcc/tree-ssa-loop-prefetch.c +++ b/gcc/tree-ssa-loop-prefetch.c @@ -80,7 +80,7 @@ along with GCC; see the file COPYING3. If not see (2) has PREFETCH_MOD 64 (3) has PREFETCH_MOD 4 (4) has PREFETCH_MOD 1. We do not set PREFETCH_BEFORE here, since - the cache line accessed by (4) is the same with probability only + the cache line accessed by (5) is the same with probability only 7/32. (5) has PREFETCH_MOD 1 as well. |