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-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/rs6000/predicates.md13
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/powerpc/pr69548.c11
4 files changed, 28 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1d89607..b061339 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
2016-02-02 Alan Modra <amodra@gmail.com>
+ PR target/69548
+ * config/rs6000/predicates.md (quad_int_reg_operand): Don't
+ allow subregs.
+
+2016-02-02 Alan Modra <amodra@gmail.com>
+
PR target/68662
* config/rs6000/rs6000.c (need_toc_init): New var, set it
whenever toc_label_name used.
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 5adc4de..072291e 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -375,20 +375,19 @@
;; Return 1 if op is a general purpose register that is an even register
;; which suitable for a load/store quad operation
+;; Subregs are not allowed here because when they are combine can
+;; create (subreg:PTI (reg:TI pseudo)) which will cause reload to
+;; think the innermost reg needs reloading, in TImode instead of
+;; PTImode. So reload will choose a reg in TImode which has no
+;; requirement that the reg be even.
(define_predicate "quad_int_reg_operand"
- (match_operand 0 "register_operand")
+ (match_code "reg")
{
HOST_WIDE_INT r;
if (!TARGET_QUAD_MEMORY && !TARGET_QUAD_MEMORY_ATOMIC)
return 0;
- if (GET_CODE (op) == SUBREG)
- op = SUBREG_REG (op);
-
- if (!REG_P (op))
- return 0;
-
r = REGNO (op);
if (r >= FIRST_PSEUDO_REGISTER)
return 1;
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1f8ddd0..c96277c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-02-02 Alan Modra <amodra@gmail.com>
+
+ PR target/69548
+ * gcc.target/powerpc/pr69548.c: New test.
+
2016-02-01 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/69592
diff --git a/gcc/testsuite/gcc.target/powerpc/pr69548.c b/gcc/testsuite/gcc.target/powerpc/pr69548.c
new file mode 100644
index 0000000..439f588
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr69548.c
@@ -0,0 +1,11 @@
+/* { dg-do assemble { target { powerpc*-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -Os -mbig" } */
+
+__int128
+quad_exchange (__int128 *ptr, __int128 newval)
+{
+ return __atomic_exchange_n (ptr, newval, __ATOMIC_RELAXED);
+}