diff options
| -rw-r--r-- | gcc/ChangeLog | 11 | ||||
| -rw-r--r-- | gcc/config/s390/s390.h | 39 | ||||
| -rw-r--r-- | gcc/config/s390/s390.md | 8 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 9 |
4 files changed, 45 insertions, 22 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 028191d..f477391 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2003-10-13 Andreas Krebbel <krebbel1@de.ibm.com> + + * config/s390/s390.md ("*fmadddf4", "*fmsubdf4", "*fmaddsf4", + "*fmsubsf4"): Insns are now dependent on TARGET_FUSED_MADD instead + of flag_unsafe_math_optimizations. + * config/s390/s390.h ("MASK_NO_FUSED_MADD", "TARGET_NO_FUSED_MADD", + "TARGET_FUSED_MADD", "TARGET_SWITCHES"): Introduced new target flags + fused-madd and no-fused-madd. + * doc/invoke.texi: Documented the new options fused-madd and + no-fused-madd for S/390. + 2003-10-14 Alan Modra <amodra@bigpond.net.au> * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Choose diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h index b395370..0a60550 100644 --- a/gcc/config/s390/s390.h +++ b/gcc/config/s390/s390.h @@ -95,6 +95,7 @@ extern int target_flags; #define MASK_ZARCH 0x20 #define MASK_MVCLE 0x40 #define MASK_TPF 0x80 +#define MASK_NO_FUSED_MADD 0x100 #define TARGET_HARD_FLOAT (target_flags & MASK_HARD_FLOAT) #define TARGET_SOFT_FLOAT (!(target_flags & MASK_HARD_FLOAT)) @@ -105,6 +106,8 @@ extern int target_flags; #define TARGET_ZARCH (target_flags & MASK_ZARCH) #define TARGET_MVCLE (target_flags & MASK_MVCLE) #define TARGET_TPF (target_flags & MASK_TPF) +#define TARGET_NO_FUSED_MADD (target_flags & MASK_NO_FUSED_MADD) +#define TARGET_FUSED_MADD (! TARGET_NO_FUSED_MADD) /* ??? Once this actually works, it could be made a runtime option. */ #define TARGET_IBM_FLOAT 0 @@ -116,23 +119,25 @@ extern int target_flags; #define TARGET_DEFAULT 0x3 #endif -#define TARGET_SWITCHES \ -{ { "hard-float", 1, N_("Use hardware fp")}, \ - { "soft-float", -1, N_("Don't use hardware fp")}, \ - { "backchain", 2, N_("Set backchain")}, \ - { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \ - { "small-exec", 4, N_("Use bras for executable < 64k")}, \ - { "no-small-exec",-4, N_("Don't use bras")}, \ - { "debug", 8, N_("Additional debug prints")}, \ - { "no-debug", -8, N_("Don't print additional debug prints")}, \ - { "64", 16, N_("64 bit ABI")}, \ - { "31", -16, N_("31 bit ABI")}, \ - { "zarch", 32, N_("z/Architecture")}, \ - { "esa", -32, N_("ESA/390 architecture")}, \ - { "mvcle", 64, N_("mvcle use")}, \ - { "no-mvcle", -64, N_("mvc&ex")}, \ - { "tpf", 128, N_("enable tpf OS code")}, \ - { "no-tpf", -128, N_("disable tpf OS code")}, \ +#define TARGET_SWITCHES \ +{ { "hard-float", 1, N_("Use hardware fp")}, \ + { "soft-float", -1, N_("Don't use hardware fp")}, \ + { "backchain", 2, N_("Set backchain")}, \ + { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")},\ + { "small-exec", 4, N_("Use bras for executable < 64k")}, \ + { "no-small-exec", -4, N_("Don't use bras")}, \ + { "debug", 8, N_("Additional debug prints")}, \ + { "no-debug", -8, N_("Don't print additional debug prints")}, \ + { "64", 16, N_("64 bit ABI")}, \ + { "31", -16, N_("31 bit ABI")}, \ + { "zarch", 32, N_("z/Architecture")}, \ + { "esa", -32, N_("ESA/390 architecture")}, \ + { "mvcle", 64, N_("mvcle use")}, \ + { "no-mvcle", -64, N_("mvc&ex")}, \ + { "tpf", 128, N_("enable tpf OS code")}, \ + { "no-tpf", -128, N_("disable tpf OS code")}, \ + { "no-fused-madd", 256, N_("disable fused multiply/add instructions")},\ + { "fused-madd", -256, N_("enable fused multiply/add instructions")}, \ { "", TARGET_DEFAULT, 0 } } #define TARGET_OPTIONS \ diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index fd92e1b..aa568f8 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -4190,7 +4190,7 @@ (plus:DF (mult:DF (match_operand:DF 1 "register_operand" "%f,f") (match_operand:DF 2 "nonimmediate_operand" "f,R")) (match_operand:DF 3 "register_operand" "0,0")))] - "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && TARGET_FUSED_MADD" "@ madbr\t%0,%1,%2 madb\t%0,%1,%2" @@ -4202,7 +4202,7 @@ (minus:DF (mult:DF (match_operand:DF 1 "register_operand" "f,f") (match_operand:DF 2 "nonimmediate_operand" "f,R")) (match_operand:DF 3 "register_operand" "0,0")))] - "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && TARGET_FUSED_MADD" "@ msdbr\t%0,%1,%2 msdb\t%0,%1,%2" @@ -4251,7 +4251,7 @@ (plus:SF (mult:SF (match_operand:SF 1 "register_operand" "%f,f") (match_operand:SF 2 "nonimmediate_operand" "f,R")) (match_operand:SF 3 "register_operand" "0,0")))] - "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && TARGET_FUSED_MADD" "@ maebr\t%0,%1,%2 maeb\t%0,%1,%2" @@ -4263,7 +4263,7 @@ (minus:SF (mult:SF (match_operand:SF 1 "register_operand" "f,f") (match_operand:SF 2 "nonimmediate_operand" "f,R")) (match_operand:SF 3 "register_operand" "0,0")))] - "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && TARGET_FUSED_MADD" "@ msebr\t%0,%1,%2 mseb\t%0,%1,%2" diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 67d61c8..474c9b7 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -624,7 +624,7 @@ in the following sections. @gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol -mhard-float -msoft-float -mbackchain -mno-backchain @gol -msmall-exec -mno-small-exec -mmvcle -mno-mvcle @gol --m64 -m31 -mdebug -mno-debug -mesa -mzarch} +-m64 -m31 -mdebug -mno-debug -mesa -mzarch -mfused-madd -mno-fused-madd} @emph{CRIS Options} @gccoptlist{-mcpu=@var{cpu} -march=@var{cpu} -mtune=@var{cpu} @gol @@ -10446,6 +10446,13 @@ except for the ABI and the set of available instructions. The list of @var{cpu-type} values is the same as for @option{-march}. The default is the value used for @option{-march}. +@item -mfused-madd +@itemx -mno-fused-madd +@opindex mfused-madd +@opindex mno-fused-madd +Generate code that uses (does not use) the floating point multiply and +accumulate instructions. These instructions are generated by default if +hardware floating point is used. @end table @node CRIS Options |