diff options
| -rw-r--r-- | gcc/config/arm/arm.c | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/pr97528.c | 28 |
2 files changed, 31 insertions, 1 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 04190b1..568e153 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -13429,7 +13429,9 @@ neon_vector_mem_operand (rtx op, int type, bool strict) /* Allow post-increment by register for VLDn */ if (type == 2 && GET_CODE (ind) == POST_MODIFY && GET_CODE (XEXP (ind, 1)) == PLUS - && REG_P (XEXP (XEXP (ind, 1), 1))) + && REG_P (XEXP (XEXP (ind, 1), 1)) + && REG_P (XEXP (ind, 0)) + && rtx_equal_p (XEXP (ind, 0), XEXP (XEXP (ind, 1), 0))) return true; /* Match: diff --git a/gcc/testsuite/gcc.target/arm/pr97528.c b/gcc/testsuite/gcc.target/arm/pr97528.c new file mode 100644 index 0000000..6cc59f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr97528.c @@ -0,0 +1,28 @@ +/* PR target/97528 */ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-O1" } */ +/* { dg-add-options arm_neon } */ + +#include <arm_neon.h> + +typedef __simd64_int16_t T; +typedef __simd64_uint16_t U; +unsigned short c; +int d; +U e; + +void +foo (void) +{ + unsigned short *dst = &c; + int g = d, b = 4; + U dc = e; + for (int h = 0; h < b; h++) + { + unsigned short *i = dst; + U j = dc; + vst1_s16 ((int16_t *) i, (T) j); + dst += g; + } +} |