diff options
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 22 | ||||
| -rw-r--r-- | gcc/expr.c | 12 | ||||
| -rw-r--r-- | gcc/optabs.c | 2 |
4 files changed, 10 insertions, 34 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 781ab8b..ef5a774 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2005-07-30 Jan Hubicka <jh@suse.cz> + + * expr.c (expand_expr_real_1): Do not load mem targets into register. + * i386.c (ix86_fixup_binary_operands): Likewise. + (ix86_expand_unary_operator): Likewise. + (ix86_expand_fp_absneg_operator): Likewise. + * optabs.c (expand_vec_cond_expr): Validate dest. + 2005-07-29 Joseph S. Myers <joseph@codesourcery.com> PR c/21720 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 591b8b6..e9cf7db 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -8154,17 +8154,6 @@ ix86_fixup_binary_operands (enum rtx_code code, enum machine_mode mode, && GET_RTX_CLASS (code) != RTX_COMM_ARITH) src1 = force_reg (mode, src1); - /* If optimizing, copy to regs to improve CSE */ - if (optimize && ! no_new_pseudos) - { - if (GET_CODE (dst) == MEM) - dst = gen_reg_rtx (mode); - if (GET_CODE (src1) == MEM) - src1 = force_reg (mode, src1); - if (GET_CODE (src2) == MEM) - src2 = force_reg (mode, src2); - } - src1 = operands[1] = src1; src2 = operands[2] = src2; return dst; @@ -8274,15 +8263,6 @@ ix86_expand_unary_operator (enum rtx_code code, enum machine_mode mode, if (MEM_P (src) && !matching_memory) src = force_reg (mode, src); - /* If optimizing, copy to regs to improve CSE. */ - if (optimize && ! no_new_pseudos) - { - if (GET_CODE (dst) == MEM) - dst = gen_reg_rtx (mode); - if (GET_CODE (src) == MEM) - src = force_reg (mode, src); - } - /* Emit the instruction. */ op = gen_rtx_SET (VOIDmode, dst, gen_rtx_fmt_e (code, mode, src)); @@ -8410,7 +8390,7 @@ ix86_expand_fp_absneg_operator (enum rtx_code code, enum machine_mode mode, matching_memory = false; if (MEM_P (dst)) { - if (rtx_equal_p (dst, src) && (!optimize || no_new_pseudos)) + if (rtx_equal_p (dst, src)) matching_memory = true; else dst = gen_reg_rtx (mode); @@ -6578,18 +6578,6 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, target = 0; } - /* If will do cse, generate all results into pseudo registers - since 1) that allows cse to find more things - and 2) otherwise cse could produce an insn the machine - cannot support. An exception is a CONSTRUCTOR into a multi-word - MEM: that's much more likely to be most efficient into the MEM. - Another is a CALL_EXPR which must return in memory. */ - - if (! cse_not_expected && mode != BLKmode && target - && (!REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER) - && ! (code == CONSTRUCTOR && GET_MODE_SIZE (mode) > UNITS_PER_WORD) - && ! (code == CALL_EXPR && aggregate_value_p (exp, exp))) - target = 0; switch (code) { diff --git a/gcc/optabs.c b/gcc/optabs.c index 2f981ab..466a56c 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -5475,7 +5475,7 @@ expand_vec_cond_expr (tree vec_cond_expr, rtx target) if (icode == CODE_FOR_nothing) return 0; - if (!target) + if (!target || !insn_data[icode].operand[0].predicate (target, mode)) target = gen_reg_rtx (mode); /* Get comparison rtx. First expand both cond expr operands. */ |