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authorMichael Meissner <meissner@linux.vnet.ibm.com>2013-05-04 05:38:47 +0000
committerMichael Meissner <meissner@gcc.gnu.org>2013-05-04 05:38:47 +0000
commit5ec6aff2dd65faa0176b9cb4a32e2ebf707aa4da (patch)
tree33ebf64e84aca3b4d16f51cc4c5b88e76ed4106f /mkdep
parent2cefad900d3f9b8d4434fb4253e16f72836c2e4a (diff)
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re PR target/57150 (GCC when targeting power7 spills long double using VSX instructions.)
[gcc] 2013-05-03 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/57150 * config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Use DFmode to save TFmode registers and DImode to save TImode registers for caller save operations. (HARD_REGNO_CALL_PART_CLOBBERED): TFmode and TDmode do not need to mark being partially clobbered since they only use the first double word. * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): TFmode and TDmode only use the upper 64-bits of each VSX register. [gcc/testsuite] 2013-05-03 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/57150 * gcc.target/powerpc/pr57150.c: New file. From-SVN: r198593
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