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authorJakub Jelinek <jakub@redhat.com>2022-04-26 10:11:58 +0200
committerJakub Jelinek <jakub@redhat.com>2022-04-26 10:11:58 +0200
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ifcvt: Improve noce_try_store_flag_mask [PR105314]
The following testcase regressed on riscv due to the splitting of critical edges in the sink pass, similarly to x86_64 compared to GCC 11 we now swap the edges, whether true or false edge goes to an empty forwarded bb. From GIMPLE POV, those 2 forms are equivalent, but as can be seen here, for some ifcvt opts it matters one way or another. On this testcase, noce_try_store_flag_mask used to trigger and transformed if (pseudo2) pseudo1 = 0; into pseudo1 &= -(pseudo2 == 0); But with the swapped edges ifcvt actually sees if (!pseudo2) pseudo3 = pseudo1; else pseudo3 = 0; and noce_try_store_flag_mask punts. IMHO there is no reason why it should punt those, it is equivalent to pseudo3 = pseudo1 & -(pseudo2 == 0); and especially if the target has 3 operand AND, it shouldn't be any more costly (and even with 2 operand AND, it might very well happen that RA can make it happen without any extra moves). Initially I've just removed the rtx_equal_p calls from the conditions and didn't add anything there, but that broke aarch64 bootstrap and regressed some testcases on x86_64, where if_info->a or if_info->b could be some larger expression that we can't force into a register. Furthermore, the case where both if_info->a and if_info->b are constants is better handled by other ifcvt optimizations like noce_try_store_flag or noce_try_inverse_constants or noce_try_store_flag_constants. So, I've restricted it to just a REG (perhaps SUBREG of REG might be ok too) next to what has been handled previously. 2022-04-26 Jakub Jelinek <jakub@redhat.com> PR rtl-optimization/105314 * ifcvt.cc (noce_try_store_flag_mask): Don't require that the non-zero operand is equal to if_info->x, instead use the non-zero operand as one of the operands of AND with if_info->x as target. * gcc.target/riscv/pr105314.c: New test.
Diffstat (limited to 'libphobos/libdruntime/gcc')
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