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author | Richard Sandiford <rsandifo@nildram.co.uk> | 2007-09-30 22:50:02 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2007-09-30 22:50:02 +0000 |
commit | 3d30741b2b9156e49531879fdb2154fde2019129 (patch) | |
tree | 872f69f3d734d6f77088296a0efc0dfa8d489b1d /libjava | |
parent | a45db20b7574c6a50e5b2c3bca189b21973a7b10 (diff) | |
download | gcc-3d30741b2b9156e49531879fdb2154fde2019129.zip gcc-3d30741b2b9156e49531879fdb2154fde2019129.tar.gz gcc-3d30741b2b9156e49531879fdb2154fde2019129.tar.bz2 |
mips.c (mips_split_64bit_move): Use gen_rtx_REG_offset rather than gen_lowpart to change a register from DImode...
gcc/
* config/mips/mips.c (mips_split_64bit_move): Use gen_rtx_REG_offset
rather than gen_lowpart to change a register from DImode to DFmode.
(mips_cannot_change_mode_class): Only allow FPRs to change mode if
both FROM and TO are integer modes that are no bigger than 4 bytes.
(mips_mode_ok_for_mov_fmt_p): New function.
(mips_preferred_reload_class): Use it instead of FLOAT_MODE_P.
(mips_secondary_reload_class): Tweak formatting and comments.
Use reg_class_subset_p instead of direct comparisons with
classes. Only allow direct FPR<->FPR moves for modes that
satisfy mips_mode_ok_for_mov_fmt_p. Only allow loads and stores
for 4- and 8-byte types. Handle reloads in which X is an FPR.
* config/mips/mips.md (*movdi_gp32_fp64): Remove f<-f alternative.
(*movdi_64bit): Likewise.
(*movsi_internal): Likewise.
(*movhi_internal): Likewise.
(*movqi_internal): Likewise.
From-SVN: r128894
Diffstat (limited to 'libjava')
0 files changed, 0 insertions, 0 deletions