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authorTom Tromey <tromey@redhat.com>2001-12-07 19:53:34 +0000
committerTom Tromey <tromey@gcc.gnu.org>2001-12-07 19:53:34 +0000
commit286f759e56a0d3e69c928755411680ec202df51d (patch)
treeb6eb11f7031ce5947f079299716c4a7c77c524a5 /libjava/verify.cc
parent8f25dc2806108d4339d8a0af97788068a8695bed (diff)
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verify.cc (_Jv_BytecodeVerifier::branch_prepass): Set start_PC earlier, for error handling.
* verify.cc (_Jv_BytecodeVerifier::branch_prepass): Set start_PC earlier, for error handling. (_Jv_BytecodeVerifier::note_branch_target): Fixed branch target check. From-SVN: r47769
Diffstat (limited to 'libjava/verify.cc')
-rw-r--r--libjava/verify.cc11
1 files changed, 8 insertions, 3 deletions
diff --git a/libjava/verify.cc b/libjava/verify.cc
index 37935c4..b0206d1 100644
--- a/libjava/verify.cc
+++ b/libjava/verify.cc
@@ -1254,8 +1254,11 @@ private:
void note_branch_target (int pc, bool is_jsr_target = false)
{
- if (pc <= PC && ! (flags[pc] & FLAG_INSN_START))
- verify_fail ("branch not to instruction start");
+ // Don't check `pc <= PC', because we've advanced PC after
+ // fetching the target and we haven't yet checked the next
+ // instruction.
+ if (pc < PC && ! (flags[pc] & FLAG_INSN_START))
+ verify_fail ("branch not to instruction start", start_PC);
flags[pc] |= FLAG_BRANCH_TARGET;
if (is_jsr_target)
{
@@ -1395,6 +1398,9 @@ private:
PC = 0;
while (PC < current_method->code_length)
{
+ // Set `start_PC' early so that error checking can have the
+ // correct value.
+ start_PC = PC;
flags[PC] |= FLAG_INSN_START;
// If the previous instruction was a jsr, then the next
@@ -1404,7 +1410,6 @@ private:
note_branch_target (PC);
last_was_jsr = false;
- start_PC = PC;
java_opcode opcode = (java_opcode) bytecode[PC++];
switch (opcode)
{