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authorRoger Sayle <roger@nextmovesoftware.com>2023-06-24 23:05:25 +0100
committerRoger Sayle <roger@nextmovesoftware.com>2023-06-24 23:05:25 +0100
commit8f6c747c8638d4c3c47ba2d4c8be86909e183132 (patch)
treedb3b4dd537d8c51dc4c34ddbc7fbba719124d762 /libjava/java
parent3f97d10aa1ff5984d6fd657f246d3f251b254ff1 (diff)
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i386: Add alternate representation for {and,or,xor}b %ah,%dh.
A patch that I'm working on to improve RTL simplifications in the middle-end results in the regression of pr78904-1b.c, due to changes in the canonical representation of high-byte (%ah, %bh, %ch, %dh) logic. See also PR target/78904. This patch avoids/prevents those failures by adding support for the alternate representation, duplicating the existing *<code>qi_ext<mode>_2 as *<code>qi_ext<mode>_3 (the new version also replacing any_or with any_logic to provide *andqi_ext<mode>_3 in the same pattern). Removing the original pattern isn't trivial, as it's generated by define_split, but this can be investigated after the other pieces are approved. The current representation of this instruction is: (set (zero_extract:DI (reg/v:DI 87 [ aD.2763 ]) (const_int 8 [0x8]) (const_int 8 [0x8])) (subreg:DI (xor:QI (subreg:QI (zero_extract:DI (reg:DI 94) (const_int 8 [0x8]) (const_int 8 [0x8])) 0) (subreg:QI (zero_extract:DI (reg/v:DI 87 [ aD.2763 ]) (const_int 8 [0x8]) (const_int 8 [0x8])) 0)) 0)) after my proposed middle-end improvement, we attempt to recognize: (set (zero_extract:DI (reg/v:DI 87 [ aD.2763 ]) (const_int 8 [0x8]) (const_int 8 [0x8])) (zero_extract:DI (xor:DI (reg:DI 94) (reg/v:DI 87 [ aD.2763 ])) (const_int 8 [0x8]) (const_int 8 [0x8]))) 2023-06-24 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
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