aboutsummaryrefslogtreecommitdiff
path: root/libitm
diff options
context:
space:
mode:
authorTorvald Riegel <triegel@redhat.com>2016-01-12 14:57:45 +0000
committerTorvald Riegel <torvald@gcc.gnu.org>2016-01-12 14:57:45 +0000
commit0d1ed41261a495ed3c821b8252283e1f26597f53 (patch)
treecce62f9d70ede7c9273428aa1052efb2ae3e0273 /libitm
parent1c3c7c414570020cfb7b510f908fc20995ab2da0 (diff)
downloadgcc-0d1ed41261a495ed3c821b8252283e1f26597f53.zip
gcc-0d1ed41261a495ed3c821b8252283e1f26597f53.tar.gz
gcc-0d1ed41261a495ed3c821b8252283e1f26597f53.tar.bz2
libitm: Remove dead code and data.
From-SVN: r232275
Diffstat (limited to 'libitm')
-rw-r--r--libitm/ChangeLog11
-rw-r--r--libitm/beginend.cc3
-rw-r--r--libitm/config/alpha/cacheline.h38
-rw-r--r--libitm/config/generic/cacheline.h58
-rw-r--r--libitm/config/powerpc/cacheline.h42
-rw-r--r--libitm/config/sparc/cacheline.h41
-rw-r--r--libitm/config/x86/cacheline.h125
-rw-r--r--libitm/libitm_i.h4
-rw-r--r--libitm/stmlock.h122
9 files changed, 11 insertions, 433 deletions
diff --git a/libitm/ChangeLog b/libitm/ChangeLog
index 19bc052..e07cca9 100644
--- a/libitm/ChangeLog
+++ b/libitm/ChangeLog
@@ -1,3 +1,14 @@
+2016-01-12 Torvald Riegel <triegel@redhat.com>
+
+ * libitm_i.h (gtm_mask_stack): Remove.
+ * beginend.cc (gtm_stmlock_array, gtm_clock): Likewise.
+ * stmlock.h: Remove file.
+ * config/alpha/cacheline.h: Likewise.
+ * config/generic/cacheline.h: Likewise.
+ * config/powerpc/cacheline.h: Likewise.
+ * config/sparc/cacheline.h: Likewise.
+ * config/x86/cacheline.h: Likewise.
+
2016-01-04 Jakub Jelinek <jakub@redhat.com>
Update copyright years.
diff --git a/libitm/beginend.cc b/libitm/beginend.cc
index 367edc8..c801dab 100644
--- a/libitm/beginend.cc
+++ b/libitm/beginend.cc
@@ -36,9 +36,6 @@ gtm_rwlock GTM::gtm_thread::serial_lock;
gtm_thread *GTM::gtm_thread::list_of_threads = 0;
unsigned GTM::gtm_thread::number_of_threads = 0;
-gtm_stmlock GTM::gtm_stmlock_array[LOCK_ARRAY_SIZE];
-atomic<gtm_version> GTM::gtm_clock;
-
/* ??? Move elsewhere when we figure out library initialization. */
uint64_t GTM::gtm_spin_count_var = 1000;
diff --git a/libitm/config/alpha/cacheline.h b/libitm/config/alpha/cacheline.h
deleted file mode 100644
index c8da46d..0000000
--- a/libitm/config/alpha/cacheline.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Copyright (C) 2009-2016 Free Software Foundation, Inc.
- Contributed by Richard Henderson <rth@redhat.com>.
-
- This file is part of the GNU Transactional Memory Library (libitm).
-
- Libitm is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details.
-
- Under Section 7 of GPL version 3, you are granted additional
- permissions described in the GCC Runtime Library Exception, version
- 3.1, as published by the Free Software Foundation.
-
- You should have received a copy of the GNU General Public License and
- a copy of the GCC Runtime Library Exception along with this program;
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- <http://www.gnu.org/licenses/>. */
-
-#ifndef LIBITM_ALPHA_CACHELINE_H
-#define LIBITM_ALPHA_CACHELINE_H 1
-
-// A cacheline is the smallest unit with which locks are associated.
-// The current implementation of the _ITM_[RW] barriers assumes that
-// all data types can fit (aligned) within a cachline, which means
-// in practice sizeof(complex long double) is the smallest cacheline size.
-// It ought to be small enough for efficient manipulation of the
-// modification mask, below.
-#define CACHELINE_SIZE 64
-
-#include "config/generic/cacheline.h"
-
-#endif // LIBITM_ALPHA_CACHELINE_H
diff --git a/libitm/config/generic/cacheline.h b/libitm/config/generic/cacheline.h
deleted file mode 100644
index 8b9f927..0000000
--- a/libitm/config/generic/cacheline.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/* Copyright (C) 2009-2016 Free Software Foundation, Inc.
- Contributed by Richard Henderson <rth@redhat.com>.
-
- This file is part of the GNU Transactional Memory Library (libitm).
-
- Libitm is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details.
-
- Under Section 7 of GPL version 3, you are granted additional
- permissions described in the GCC Runtime Library Exception, version
- 3.1, as published by the Free Software Foundation.
-
- You should have received a copy of the GNU General Public License and
- a copy of the GCC Runtime Library Exception along with this program;
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- <http://www.gnu.org/licenses/>. */
-
-#ifndef LIBITM_CACHELINE_H
-#define LIBITM_CACHELINE_H 1
-
-namespace GTM HIDDEN {
-
-// A cacheline is the smallest unit with which locks are associated.
-// The current implementation of the _ITM_[RW] barriers assumes that
-// all data types can fit (aligned) within a cachline, which means
-// in practice sizeof(complex long double) is the smallest cacheline size.
-// It ought to be small enough for efficient manipulation of the
-// modification mask, below.
-#ifndef CACHELINE_SIZE
-# define CACHELINE_SIZE 32
-#endif
-
-// A gtm_cacheline_mask stores a modified bit for every modified byte
-// in the cacheline with which it is associated.
-typedef sized_integral<CACHELINE_SIZE / 8>::type gtm_cacheline_mask;
-
-union gtm_cacheline
-{
- // Byte access to the cacheline.
- unsigned char b[CACHELINE_SIZE] __attribute__((aligned(CACHELINE_SIZE)));
-
- // Larger sized access to the cacheline.
- uint16_t u16[CACHELINE_SIZE / sizeof(uint16_t)];
- uint32_t u32[CACHELINE_SIZE / sizeof(uint32_t)];
- uint64_t u64[CACHELINE_SIZE / sizeof(uint64_t)];
- gtm_word w[CACHELINE_SIZE / sizeof(gtm_word)];
-};
-
-} // namespace GTM
-
-#endif // LIBITM_CACHELINE_H
diff --git a/libitm/config/powerpc/cacheline.h b/libitm/config/powerpc/cacheline.h
deleted file mode 100644
index ce06b40..0000000
--- a/libitm/config/powerpc/cacheline.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* Copyright (C) 2012-2016 Free Software Foundation, Inc.
- Contributed by Richard Henderson <rth@redhat.com>.
-
- This file is part of the GNU Transactional Memory Library (libitm).
-
- Libitm is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details.
-
- Under Section 7 of GPL version 3, you are granted additional
- permissions described in the GCC Runtime Library Exception, version
- 3.1, as published by the Free Software Foundation.
-
- You should have received a copy of the GNU General Public License and
- a copy of the GCC Runtime Library Exception along with this program;
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- <http://www.gnu.org/licenses/>. */
-
-#ifndef LIBITM_POWERPC_CACHELINE_H
-#define LIBITM_POWERPC_CACHELINE_H 1
-
-// A cacheline is the smallest unit with which locks are associated.
-// The current implementation of the _ITM_[RW] barriers assumes that
-// all data types can fit (aligned) within a cachline, which means
-// in practice sizeof(complex long double) is the smallest cacheline size.
-// It ought to be small enough for efficient manipulation of the
-// modification mask, below.
-#if defined (__powerpc64__) || defined (__ppc64__)
-# define CACHELINE_SIZE 64
-#else
-# define CACHELINE_SIZE 32
-#endif
-
-#include "config/generic/cacheline.h"
-
-#endif // LIBITM_POWERPC_CACHELINE_H
diff --git a/libitm/config/sparc/cacheline.h b/libitm/config/sparc/cacheline.h
deleted file mode 100644
index 732016e..0000000
--- a/libitm/config/sparc/cacheline.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/* Copyright (C) 2012-2016 Free Software Foundation, Inc.
-
- This file is part of the GNU Transactional Memory Library (libitm).
-
- Libitm is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details.
-
- Under Section 7 of GPL version 3, you are granted additional
- permissions described in the GCC Runtime Library Exception, version
- 3.1, as published by the Free Software Foundation.
-
- You should have received a copy of the GNU General Public License and
- a copy of the GCC Runtime Library Exception along with this program;
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- <http://www.gnu.org/licenses/>. */
-
-#ifndef LIBITM_SPARC_CACHELINE_H
-#define LIBITM_SPARC_CACHELINE_H 1
-
-// A cacheline is the smallest unit with which locks are associated.
-// The current implementation of the _ITM_[RW] barriers assumes that
-// all data types can fit (aligned) within a cachline, which means
-// in practice sizeof(complex long double) is the smallest cacheline size.
-// It ought to be small enough for efficient manipulation of the
-// modification mask, below.
-#ifdef __arch64__
-# define CACHELINE_SIZE 64
-#else
-# define CACHELINE_SIZE 32
-#endif
-
-#include "config/generic/cacheline.h"
-
-#endif // LIBITM_SPARC_CACHELINE_H
diff --git a/libitm/config/x86/cacheline.h b/libitm/config/x86/cacheline.h
deleted file mode 100644
index 1c52193..0000000
--- a/libitm/config/x86/cacheline.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/* Copyright (C) 2009-2016 Free Software Foundation, Inc.
- Contributed by Richard Henderson <rth@redhat.com>.
-
- This file is part of the GNU Transactional Memory Library (libitm).
-
- Libitm is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details.
-
- Under Section 7 of GPL version 3, you are granted additional
- permissions described in the GCC Runtime Library Exception, version
- 3.1, as published by the Free Software Foundation.
-
- You should have received a copy of the GNU General Public License and
- a copy of the GCC Runtime Library Exception along with this program;
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- <http://www.gnu.org/licenses/>. */
-
-#ifndef LIBITM_CACHELINE_H
-#define LIBITM_CACHELINE_H 1
-
-// Minimum cacheline size is 32, due to both complex long double and __m256.
-// There's no requirement that 64-bit use a 64-byte cacheline size, but do
-// so for now to make sure everything is parameterized properly.
-#ifdef __x86_64__
-# define CACHELINE_SIZE 64
-#else
-# define CACHELINE_SIZE 32
-#endif
-
-namespace GTM HIDDEN {
-
-// A gtm_cacheline_mask stores a modified bit for every modified byte
-// in the cacheline with which it is associated.
-typedef sized_integral<CACHELINE_SIZE / 8>::type gtm_cacheline_mask;
-
-union gtm_cacheline
-{
- // Byte access to the cacheline.
- unsigned char b[CACHELINE_SIZE] __attribute__((aligned(CACHELINE_SIZE)));
-
- // Larger sized access to the cacheline.
- uint16_t u16[CACHELINE_SIZE / sizeof(uint16_t)];
- uint32_t u32[CACHELINE_SIZE / sizeof(uint32_t)];
- uint64_t u64[CACHELINE_SIZE / sizeof(uint64_t)];
- gtm_word w[CACHELINE_SIZE / sizeof(gtm_word)];
-
-#ifdef __MMX__
- __m64 m64[CACHELINE_SIZE / sizeof(__m64)];
-#endif
-#ifdef __SSE__
- __m128 m128[CACHELINE_SIZE / sizeof(__m128)];
-#endif
-#ifdef __SSE2__
- __m128i m128i[CACHELINE_SIZE / sizeof(__m128i)];
-#endif
-#ifdef __AVX__
- __m256 m256[CACHELINE_SIZE / sizeof(__m256)];
- __m256i m256i[CACHELINE_SIZE / sizeof(__m256i)];
-#endif
-
-#if defined(__SSE__) || defined(__AVX__)
- // Copy S to D; only bother defining if we can do this more efficiently
- // than the compiler-generated default implementation.
- gtm_cacheline& operator= (const gtm_cacheline &s);
-#endif // SSE, AVX
-};
-
-#if defined(__SSE__) || defined(__AVX__)
-inline gtm_cacheline& ALWAYS_INLINE
-gtm_cacheline::operator= (const gtm_cacheline & __restrict s)
-{
-#ifdef __AVX__
-# define CP m256
-# define TYPE __m256
-#else
-# define CP m128
-# define TYPE __m128
-#endif
-
- TYPE w, x, y, z;
-
- // ??? Wouldn't it be nice to have a pragma to tell the compiler
- // to completely unroll a given loop?
- switch (CACHELINE_SIZE / sizeof(TYPE))
- {
- case 1:
- this->CP[0] = s.CP[0];
- break;
- case 2:
- x = s.CP[0];
- y = s.CP[1];
- this->CP[0] = x;
- this->CP[1] = y;
- break;
- case 4:
- w = s.CP[0];
- x = s.CP[1];
- y = s.CP[2];
- z = s.CP[3];
- this->CP[0] = w;
- this->CP[1] = x;
- this->CP[2] = y;
- this->CP[3] = z;
- break;
- default:
- __builtin_trap ();
- }
-
- return *this;
-
-#undef CP
-#undef TYPE
-}
-#endif
-
-} // namespace GTM
-
-#endif // LIBITM_CACHELINE_H
diff --git a/libitm/libitm_i.h b/libitm/libitm_i.h
index fd7c4d2..751b4ab 100644
--- a/libitm/libitm_i.h
+++ b/libitm/libitm_i.h
@@ -82,8 +82,6 @@ enum gtm_restart_reason
#include "target.h"
#include "rwlock.h"
#include "aatree.h"
-#include "cacheline.h"
-#include "stmlock.h"
#include "dispatch.h"
#include "containers.h"
@@ -354,8 +352,6 @@ extern abi_dispatch *dispatch_gl_wt();
extern abi_dispatch *dispatch_ml_wt();
extern abi_dispatch *dispatch_htm();
-extern gtm_cacheline_mask gtm_mask_stack(gtm_cacheline *, gtm_cacheline_mask);
-
// Control variable for the HTM fastpath that uses serial mode as fallback.
// Non-zero if the HTM fastpath is enabled. See gtm_thread::begin_transaction.
// Accessed from assembly language, thus the "asm" specifier on
diff --git a/libitm/stmlock.h b/libitm/stmlock.h
deleted file mode 100644
index 6a8c11e..0000000
--- a/libitm/stmlock.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/* Copyright (C) 2009-2016 Free Software Foundation, Inc.
- Contributed by Richard Henderson <rth@redhat.com>.
-
- This file is part of the GNU Transactional Memory Library (libitm).
-
- Libitm is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details.
-
- Under Section 7 of GPL version 3, you are granted additional
- permissions described in the GCC Runtime Library Exception, version
- 3.1, as published by the Free Software Foundation.
-
- You should have received a copy of the GNU General Public License and
- a copy of the GCC Runtime Library Exception along with this program;
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- <http://www.gnu.org/licenses/>. */
-
-#ifndef LIBITM_STMLOCK_H
-#define LIBITM_STMLOCK_H 1
-
-namespace GTM HIDDEN {
-
-/* A versioned write lock on a cacheline. This must be wide enough to
- store a pointer, and preferably wide enough to avoid overflowing the
- version counter. Thus we use a "word", which should be 64-bits on
- 64-bit systems even when their pointer size is forced smaller. */
-typedef gtm_word gtm_stmlock;
-
-/* This has to be the same size as gtm_stmlock, we just use this name
- for documentation purposes. */
-typedef gtm_word gtm_version;
-
-/* The maximum value a version number can have. This is a consequence
- of having the low bit of gtm_stmlock reserved for the owned bit. */
-#define GTM_VERSION_MAX (~(gtm_version)0 >> 1)
-
-/* A value that may be used to indicate "uninitialized" for a version. */
-#define GTM_VERSION_INVALID (~(gtm_version)0)
-
-/* This bit is set when the write lock is held. When set, the balance of
- the bits in the lock is a pointer that references STM backend specific
- data; it is up to the STM backend to determine if this thread holds the
- lock. If this bit is clear, the balance of the bits are the last
- version number committed to the cacheline. */
-static inline bool
-gtm_stmlock_owned_p (gtm_stmlock lock)
-{
- return lock & 1;
-}
-
-static inline gtm_stmlock
-gtm_stmlock_set_owned (void *data)
-{
- return (gtm_stmlock)(uintptr_t)data | 1;
-}
-
-static inline void *
-gtm_stmlock_get_addr (gtm_stmlock lock)
-{
- return (void *)((uintptr_t)lock & ~(uintptr_t)1);
-}
-
-static inline gtm_version
-gtm_stmlock_get_version (gtm_stmlock lock)
-{
- return lock >> 1;
-}
-
-static inline gtm_stmlock
-gtm_stmlock_set_version (gtm_version ver)
-{
- return ver << 1;
-}
-
-/* We use a fixed set of locks for all memory, hashed into the
- following table. */
-#define LOCK_ARRAY_SIZE (1024 * 1024)
-extern gtm_stmlock gtm_stmlock_array[LOCK_ARRAY_SIZE];
-
-static inline gtm_stmlock *
-gtm_get_stmlock (const gtm_cacheline *addr)
-{
- size_t idx = ((uintptr_t) addr / CACHELINE_SIZE) % LOCK_ARRAY_SIZE;
- return gtm_stmlock_array + idx;
-}
-
-/* The current global version number. */
-extern atomic<gtm_version> gtm_clock;
-
-static inline gtm_version
-gtm_get_clock (void)
-{
- atomic_thread_fence(memory_order_release);
- return gtm_clock.load(memory_order_acquire);
-}
-
-static inline gtm_version
-gtm_inc_clock (void)
-{
- /* ??? Here we have a choice, the pre-inc operator mapping to
- __atomic_add_fetch with memory_order_seq_cst, or fetch_add
- with memory_order_acq_rel plus another separate increment.
- We really ought to recognize and optimize fetch_op(x) op x... */
- gtm_version r = ++gtm_clock;
-
- /* ??? Ought to handle wraparound for 32-bit. */
- if (sizeof(r) < 8 && r > GTM_VERSION_MAX)
- abort ();
-
- return r;
-}
-
-} // namespace GTM
-
-#endif // LIBITM_STMLOCK_H