aarch64: enable mixed-types for aarch64 simdclones

This patch enables the use of mixed-types for simd clones for AArch64, adds
aarch64 as a target_vect_simd_clones and corrects the way the simdlen is chosen
for non-specified simdlen clauses according to the 'Vector Function Application
Binary Interface Specification for AArch64'.

Additionally this patch also restricts combinations of simdlen and
return/argument types that map to vectors larger than 128 bits as we currently
do not have a way to represent these types in a way that is consistent
internally and externally.

gcc/ChangeLog:

	* config/aarch64/aarch64.cc (lane_size): New function.
	(aarch64_simd_clone_compute_vecsize_and_simdlen): Determine simdlen according to NDS rule
	and reject combination of simdlen and types that lead to vectors larger than 128bits.

gcc/testsuite/ChangeLog:

	* lib/target-supports.exp: Add aarch64 targets to vect_simd_clones.
	* c-c++-common/gomp/declare-variant-14.c: Adapt test for aarch64.
	* c-c++-common/gomp/pr60823-1.c: Likewise.
	* c-c++-common/gomp/pr60823-2.c: Likewise.
	* c-c++-common/gomp/pr60823-3.c: Likewise.
	* g++.dg/gomp/attrs-10.C: Likewise.
	* g++.dg/gomp/declare-simd-1.C: Likewise.
	* g++.dg/gomp/declare-simd-3.C: Likewise.
	* g++.dg/gomp/declare-simd-4.C: Likewise.
	* g++.dg/gomp/declare-simd-7.C: Likewise.
	* g++.dg/gomp/declare-simd-8.C: Likewise.
	* g++.dg/gomp/pr88182.C: Likewise.
	* gcc.dg/declare-simd.c: Likewise.
	* gcc.dg/gomp/declare-simd-1.c: Likewise.
	* gcc.dg/gomp/declare-simd-3.c: Likewise.
	* gcc.dg/gomp/pr87887-1.c: Likewise.
	* gcc.dg/gomp/pr87895-1.c: Likewise.
	* gcc.dg/gomp/pr89246-1.c: Likewise.
	* gcc.dg/gomp/pr99542.c: Likewise.
	* gcc.dg/gomp/simd-clones-2.c: Likewise.
	* gcc.dg/vect/vect-simd-clone-1.c: Likewise.
	* gcc.dg/vect/vect-simd-clone-2.c: Likewise.
	* gcc.dg/vect/vect-simd-clone-4.c: Likewise.
	* gcc.dg/vect/vect-simd-clone-5.c: Likewise.
	* gcc.dg/vect/vect-simd-clone-6.c: Likewise.
	* gcc.dg/vect/vect-simd-clone-7.c: Likewise.
	* gcc.dg/vect/vect-simd-clone-8.c: Likewise.
	* gfortran.dg/gomp/declare-simd-2.f90: Likewise.
	* gfortran.dg/gomp/declare-simd-coarray-lib.f90: Likewise.
	* gfortran.dg/gomp/declare-variant-14.f90: Likewise.
	* gfortran.dg/gomp/pr79154-1.f90: Likewise.
	* gfortran.dg/gomp/pr83977.f90: Likewise.

libgomp/ChangeLog:

	* testsuite/libgomp.c/declare-variant-1.c: Adapt test for aarch64.
	* testsuite/libgomp.fortran/declare-simd-1.f90: Likewise.

2 files changed, 13 insertions, 3 deletions

diff --git a/libgomp/testsuite/libgomp.c/declare-variant-1.c b/libgomp/testsuite/libgomp.c/declare-variant-1.c
index d16608f..6129f23 100644
--- a/libgomp/testsuite/libgomp.c/declare-variant-1.c
+++ b/libgomp/testsuite/libgomp.c/declare-variant-1.c
@@ -46,8 +46,10 @@ test1 (int x)
      call f03 (score 6), the sse2/avx/avx2 clones too, but avx512f clones
      shall call f01 with score 8.  */
   /* { dg-final { scan-ltrans-tree-dump-not "f04 \\\(x" "optimized" } } */
-  /* { dg-final { scan-ltrans-tree-dump-times "f03 \\\(x" 14 "optimized" } } */
-  /* { dg-final { scan-ltrans-tree-dump-times "f01 \\\(x" 4 "optimized" } } */
+  /* { dg-final { scan-ltrans-tree-dump-times "f03 \\\(x" 14 "optimized" { target { !aarch64*-*-* } } } } } */
+  /* { dg-final { scan-ltrans-tree-dump-times "f01 \\\(x" 4 "optimized" { target { !aarch64*-*-* } } } } } */
+  /* { dg-final { scan-ltrans-tree-dump-times "f03 \\\(x" 10 "optimized" { target { aarch64*-*-* } } } } } */
+  /* { dg-final { scan-ltrans-tree-dump-not "f01 \\\(x" "optimized" { target { aarch64*-*-* } } } } } */
   int a = f04 (x);
   int b = f04 (x);
   return a + b;
diff --git a/libgomp/testsuite/libgomp.fortran/declare-simd-1.f90 b/libgomp/testsuite/libgomp.fortran/declare-simd-1.f90
index cb8f4df..9d44524 100644
--- a/libgomp/testsuite/libgomp.fortran/declare-simd-1.f90
+++ b/libgomp/testsuite/libgomp.fortran/declare-simd-1.f90
@@ -1,5 +1,5 @@
 ! { dg-do run { target vect_simd_clones } }
-! { dg-options "-fno-inline" }
+! { dg-options "-fno-inline -cpp -D__aarch64__" }
 ! { dg-additional-options "-msse2" { target sse2_runtime } }
 ! { dg-additional-options "-mavx" { target avx_runtime } }
 
@@ -75,7 +75,11 @@ end module declare_simd_1_mod
   end do
 contains
   function baz (x, y, z)
+#ifdef __aarch64__
+    !$omp declare simd (baz) simdlen (4) uniform (x, y)
+#else
     !$omp declare simd (baz) simdlen (8) uniform (x, y)
+#endif
     !$omp declare simd (baz)
     integer, value :: y
     real, value :: z
@@ -90,6 +94,10 @@ function bar (a, b, c)
   real :: bar
   double precision, value :: a
   !$omp declare simd (bar)
+#ifdef __aarch64__
+  !$omp declare simd (bar) simdlen (2) linear (b : 2)
+#else
   !$omp declare simd (bar) simdlen (4) linear (b : 2)
+#endif
   bar = a + b * c
 end function bar