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| author | Jiahao Xu <xujiahao@loongson.cn> | 2023-11-17 17:00:21 +0800 |
|---|---|---|
| committer | Lulu Cheng <chenglulu@loongson.cn> | 2023-12-08 16:06:05 +0800 |
| commit | bf3ff057f62971ee9de6e3051c3e295be55eb62d (patch) | |
| tree | b9cf4f6b2337cecc74ad06b82d1d5d45ba3d52a5 /libgomp/target.c | |
| parent | f32e49add80cb3a22969b12034509d326aa69c5d (diff) | |
| download | gcc-bf3ff057f62971ee9de6e3051c3e295be55eb62d.zip gcc-bf3ff057f62971ee9de6e3051c3e295be55eb62d.tar.gz gcc-bf3ff057f62971ee9de6e3051c3e295be55eb62d.tar.bz2 | |
LoongArch: Add support for xorsign.
This patch adds support for xorsign pattern to scalar fp and vector. With the
new expands, uniformly using vector bitwise logical operations to handle xorsign.
On LoongArch64, floating-point registers and vector registers share the same register,
so this patch also allows conversion between LSX vector mode and scalar fp mode to
avoid unnecessary instruction generation.
gcc/ChangeLog:
* config/loongarch/lasx.md (xorsign<mode>3): New expander.
* config/loongarch/loongarch.cc (loongarch_can_change_mode_class): Allow
conversion between LSX vector mode and scalar fp mode.
* config/loongarch/loongarch.md (@xorsign<mode>3): New expander.
* config/loongarch/lsx.md (@xorsign<mode>3): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/vector/lasx/lasx-xorsign-run.c: New test.
* gcc.target/loongarch/vector/lasx/lasx-xorsign.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-xorsign-run.c: New test.
* gcc.target/loongarch/vector/lsx/lsx-xorsign.c: New test.
* gcc.target/loongarch/xorsign-run.c: New test.
* gcc.target/loongarch/xorsign.c: New test.
Diffstat (limited to 'libgomp/target.c')
0 files changed, 0 insertions, 0 deletions