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authorPan Li <pan2.li@intel.com>2023-12-08 14:48:48 +0800
committerPan Li <pan2.li@intel.com>2023-12-08 16:18:15 +0800
commit51b8259212791dbea846706bc5e9db5310f1fc10 (patch)
tree2c6e2fad412f4a0a4ea665cf88263c759bfab62a /libgomp/target.c
parentbf3ff057f62971ee9de6e3051c3e295be55eb62d (diff)
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RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE
The mode attr V_F2DI_CONVERT_BRIDGE converts the floating-point mode to the widden floating-point by design. But we take (RVVM1HF "RVVM2SI") by mistake. This patch would like to fix it by replacing the (RVVM1HF "RVVM2SI") to (RVVM1HF "RVVM2SF") as design. gcc/ChangeLog: * config/riscv/vector-iterators.md: Replace RVVM2SI to RVVM2SF for mode attr V_F2DI_CONVERT_BRIDGE. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/unop/math-lroundf16-rv64-ice-1.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'libgomp/target.c')
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