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| author | Haochen Jiang <haochen.jiang@intel.com> | 2023-08-17 14:19:05 +0800 |
|---|---|---|
| committer | Haochen Jiang <haochen.jiang@intel.com> | 2023-08-17 14:19:05 +0800 |
| commit | 2485dd9b4e219307f00d683077bbaf5a2add6604 (patch) | |
| tree | 952d097a8025d4c411057e793edf4a72ae1a853d /libgomp/allocator.c | |
| parent | 26a820dc136b00b4dc37609429576b6a914cb572 (diff) | |
| download | gcc-2485dd9b4e219307f00d683077bbaf5a2add6604.zip gcc-2485dd9b4e219307f00d683077bbaf5a2add6604.tar.gz gcc-2485dd9b4e219307f00d683077bbaf5a2add6604.tar.bz2 | |
Support AVX10.1 for AVX512DQ+AVX512VL intrins
gcc/ChangeLog:
* config/i386/avx512vldqintrin.h: Remove target attribute.
* config/i386/i386-builtin.def (BDESC):
Add OPTION_MASK_ISA2_AVX10_1.
* config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
* config/i386/i386-expand.cc
(ix86_check_builtin_isa_match): Ditto.
(ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
* config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
and avx10_1_or_avx512vl.
* config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
(VF1_128_256VLDQ_AVX10_1): Ditto.
(VI8_AVX512VLDQ_AVX10_1): Ditto.
(<sse>_andnot<mode>3<mask_name>):
Add TARGET_AVX10_1 and change isa attr from avx512dq to
avx10_1_or_avx512dq.
(*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
avx512vl to avx10_1_or_avx512vl.
(fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
(fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
Ditto.
(ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
Ditto.
(fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
(avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
Add TARGET_AVX10_1.
(fix<fixunssuffix>_truncv2sfv2di2): Ditto.
(cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
Remove target check.
(avx512dq_mul<mode>3<mask_name>): Ditto.
(*avx512dq_mul<mode>3<mask_name>): Ditto.
(VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
(<mask_codefor>avx512dq_broadcast<mode><mask_name>):
Remove target check.
(VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
(<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
Remove target check.
* config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
(mask_avx512vl_condition): Ditto.
(mask): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx-1.c: Add -mavx10.1.
* gcc.target/i386/avx-2.c: Ditto.
* gcc.target/i386/sse-26.c: Skip AVX512VLDQ intrin file.
Diffstat (limited to 'libgomp/allocator.c')
0 files changed, 0 insertions, 0 deletions