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| author | H.J. Lu <hongjiu.lu@intel.com> | 2019-09-18 19:49:19 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2019-09-18 12:49:19 -0700 |
| commit | 101a0841b6fad201172e90f716d6c1866d7b0a36 (patch) | |
| tree | 8bf69732553f5ab877eee2dbbdf83545ef978e34 /libgo/sysinfo.c | |
| parent | 22a8ab772c37dc6250f2b22afe1e91b55fda41f5 (diff) | |
| download | gcc-101a0841b6fad201172e90f716d6c1866d7b0a36.zip gcc-101a0841b6fad201172e90f716d6c1866d7b0a36.tar.gz gcc-101a0841b6fad201172e90f716d6c1866d7b0a36.tar.bz2 | |
i386: Increase Skylake SImode pseudo register store cost
On Skylake, SImode store cost isn't less than half cost of 128-bit vector
store. This patch increases Skylake SImode pseudo register store cost to
make it the same as QImode and HImode.
gcc/
PR target/91446
* config/i386/x86-tune-costs.h (skylake_cost): Increase SImode
pseudo register store cost from 3 to 6 to make it the same as
QImode and HImode.
gcc/testsuite/
PR target/91446
* gcc.target/i386/pr91446.c: New test.
From-SVN: r275905
Diffstat (limited to 'libgo/sysinfo.c')
0 files changed, 0 insertions, 0 deletions