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| author | liuhongt <hongtao.liu@intel.com> | 2023-10-10 11:32:09 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2023-10-11 12:58:17 +0800 |
| commit | 4efe9085d087a8d94261e4c38dd2ba840f3419ac (patch) | |
| tree | 79d811974a845b49a61a3d8d3e5d3b17c4d81f4a /libgcc | |
| parent | de04f73eefd856914f4a253ad2f1579239512e31 (diff) | |
| download | gcc-4efe9085d087a8d94261e4c38dd2ba840f3419ac.zip gcc-4efe9085d087a8d94261e4c38dd2ba840f3419ac.tar.gz gcc-4efe9085d087a8d94261e4c38dd2ba840f3419ac.tar.bz2 | |
Refine predicate of operands[2] in divv4hf3 with register_operand.
In the expander, it will emit below insn.
rtx tmp = gen_rtx_VEC_CONCAT (V4SFmode, operands[2],
force_reg (V2SFmode, CONST1_RTX (V2SFmode)));
but *vec_concat<mode> only allow register_operand.
gcc/ChangeLog:
PR target/111745
* config/i386/mmx.md (divv4hf3): Refine predicate of
operands[2] with register_operand.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr111745.c: New test.
Diffstat (limited to 'libgcc')
0 files changed, 0 insertions, 0 deletions