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author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2013-11-12 20:55:58 +0000 |
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committer | Michael Meissner <meissner@gcc.gnu.org> | 2013-11-12 20:55:58 +0000 |
commit | 7f6ada80ce8db681c72269f598cefb3c8ca236e0 (patch) | |
tree | daa182cfe3aeab159a3dc7b0515a091f07235421 /libgcc | |
parent | 45b0be94bed1f11918c43b420934eac6e2a11bf6 (diff) | |
download | gcc-7f6ada80ce8db681c72269f598cefb3c8ca236e0.zip gcc-7f6ada80ce8db681c72269f598cefb3c8ca236e0.tar.gz gcc-7f6ada80ce8db681c72269f598cefb3c8ca236e0.tar.bz2 |
re PR target/59054 (Powerpc -O0 -mcpu=power7 generates sub-optimal code to load 0)
2013-11-12 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/59054
* config/rs6000/rs6000.md (movdi_internal32): Eliminate
constraints that would allow DImode into the traditional Altivec
registers, but cause undesirable code generation when loading 0 as
a constant.
(movdi_internal64): Likewise.
(cmp<mode>_fpr): Do not use %x for CR register output.
(extendsfdf2_fpr): Fix constraints when -mallow-upper-df and
-mallow-upper-sf debug switches are used.
[gcc/testsuite]
2013-11-12 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/59054
* gcc.target/powerpc/pr59054.c: New test.
From-SVN: r204718
Diffstat (limited to 'libgcc')
0 files changed, 0 insertions, 0 deletions