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authorFei Gao <gaofei@eswincomputing.com>2024-04-15 06:33:17 +0000
committerFei Gao <gaofei@eswincomputing.com>2024-04-16 05:24:41 +0000
commit6e925ba0a8b9619ed789a456b087755b488d66f1 (patch)
tree7ccb51a6a3a0373c2bd2708502c5eb4d75fc72e2 /libgcc
parentc39dc5bb65c492fafc5a0fde83708b8d24e0338d (diff)
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optimize Zicond conditional select cases.
When one of the two input operands is 0, ADD and IOR are functionally equivalent. ADD is slightly preferred over IOR because ADD has a higher likelihood of being implemented as a compressed instruction when compared to IOR. C.ADD uses the CR format with any of the 32 RVI registers availble, while C.OR uses the CA format with limit to just 8 of them. Conditional select, if zero case: rd = (rc == 0) ? rs1 : rs2 before patch: czero.nez rd, rs1, rc czero.eqz rtmp, rs2, rc or rd, rd, rtmp after patch: czero.eqz rd, rs1, rc czero.nez rtmp, rs2, rc add rd, rd, rtmp Same trick applies for the conditional select, if non-zero case: rd = (rc != 0) ? rs1 : rs2 gcc/ChangeLog: * config/riscv/riscv.cc (riscv_expand_conditional_move): replace or with add when expanding zicond if possible. gcc/testsuite/ChangeLog: * gcc.target/riscv/zicond-prefer-add-to-or.c: New test.
Diffstat (limited to 'libgcc')
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