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| author | Jakub Jelinek <jakub@redhat.com> | 2024-04-23 23:30:27 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@redhat.com> | 2024-04-23 23:30:27 +0200 |
| commit | 628c2221d38715a64f828e3635317293d150e001 (patch) | |
| tree | 7b385335fa4ea11e307f89c2b571357ff23b4bde /libgcc | |
| parent | f7a5c993e583467f7e0fc514c878178ff7b88527 (diff) | |
| download | gcc-628c2221d38715a64f828e3635317293d150e001.zip gcc-628c2221d38715a64f828e3635317293d150e001.tar.gz gcc-628c2221d38715a64f828e3635317293d150e001.tar.bz2 | |
i386: Avoid =&r,r,r andn double-word alternative for ia32 [PR114810]
As discussed in the PR, on ia32 with its 8 GPRs, where 1 is always fixed
and other 2 often are as well having an alternative which needs 3
double-word registers is just too much for RA.
The following patch splits that alternative into two, one with o is used
even on ia32, but one with the 3x r is used just for -m64/-mx32.
Tried to reduce the testcase further, but it wasn't easily possible.
2024-04-23 Jakub Jelinek <jakub@redhat.com>
PR target/114810
* config/i386/i386.md (*andn<dwi>3_doubleword_bmi): Split the =&r,r,ro
alternative into =&r,r,r enabled only for x64 and =&r,r,o.
* g++.target/i386/pr114810.C: New test.
Diffstat (limited to 'libgcc')
0 files changed, 0 insertions, 0 deletions