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| author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-11-01 20:47:28 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-11-01 20:47:28 +0000 |
| commit | ff1335e2080f16f9b42b9a886c8c063f869a6eed (patch) | |
| tree | 1c94e8a34c9825fdf1cfce0fab744f56fa0f55b4 /libgcc | |
| parent | 0100c5f9b7d6e622d66bc90da0f2bfcdf9722d71 (diff) | |
| download | gcc-ff1335e2080f16f9b42b9a886c8c063f869a6eed.zip gcc-ff1335e2080f16f9b42b9a886c8c063f869a6eed.tar.gz gcc-ff1335e2080f16f9b42b9a886c8c063f869a6eed.tar.bz2 | |
[AArch64] Rename the internal "Upl" constraint
The SVE port uses the public constraints "Upl" and "Upa" to mean
"low predicate register" and "any predicate register" respectively.
"Upl" was already used as an internal-only constraint by the
addition patterns, so this patch renames it to "Uaa" ("two adds
needed").
2017-11-01 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* config/aarch64/constraints.md (Upl): Rename to...
(Uaa): ...this.
* config/aarch64/aarch64.md
(*zero_extend<SHORT:mode><GPI:mode>2_aarch64, *addsi3_aarch64_uxtw):
Update accordingly.
Reviewed-By: James Greenhalgh <james.greenhalgh@arm.com>
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r254326
Diffstat (limited to 'libgcc')
0 files changed, 0 insertions, 0 deletions