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authorAurelien Jarno <aurelien@aurel32.net>2016-07-21 08:27:47 +0000
committerRamana Radhakrishnan <ramana@gcc.gnu.org>2016-07-21 08:27:47 +0000
commita1b01d34036c85f23b7ca1a2c99e5b6bb0b8e68c (patch)
tree3973337fb07a5c53e6c89382ef87a62c8ee3a2c6 /libgcc/config
parent23974819345d2dc793cc77c85a5d84d05c787fa2 (diff)
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[ARM] Fix PR target/59833
For Aurelien Jarno <aurelien@aurel32.net> On ARM soft-float, the float to double conversion doesn't convert a sNaN to qNaN as the IEEE Std 754 standard mandates: "Under default exception handling, any operation signaling an invalid operation exception and for which a floating-point result is to be delivered shall deliver a quiet NaN." Given the soft float ARM code ignores exceptions and always provides a result, a float to double conversion of a signaling NaN should return a quiet NaN. Fix this in extendsfdf2. gcc/ChangeLog: PR target/59833 * config/arm/ieee754-df.S (extendsfdf2): Convert sNaN to qNaN. gcc/testsuite/ChangeLog: * gcc.dg/pr59833.c: New testcase. From-SVN: r238584
Diffstat (limited to 'libgcc/config')
-rw-r--r--libgcc/config/arm/ieee754-df.S10
1 files changed, 7 insertions, 3 deletions
diff --git a/libgcc/config/arm/ieee754-df.S b/libgcc/config/arm/ieee754-df.S
index a2aac70..1ecaa9d 100644
--- a/libgcc/config/arm/ieee754-df.S
+++ b/libgcc/config/arm/ieee754-df.S
@@ -507,11 +507,15 @@ ARM_FUNC_ALIAS aeabi_f2d extendsfdf2
eorne xh, xh, #0x38000000 @ fixup exponent otherwise.
RETc(ne) @ and return it.
- teq r2, #0 @ if actually 0
- do_it ne, e
- teqne r3, #0xff000000 @ or INF or NAN
+ bics r2, r2, #0xff000000 @ isolate mantissa
+ do_it eq @ if 0, that is ZERO or INF,
RETc(eq) @ we are done already.
+ teq r3, #0xff000000 @ check for NAN
+ do_it eq, t
+ orreq xh, xh, #0x00080000 @ change to quiet NAN
+ RETc(eq) @ and return it.
+
@ value was denormalized. We can normalize it now.
do_push {r4, r5, lr}
.cfi_adjust_cfa_offset 12 @ CFA is now sp + previousOffset + 12